TMPR4925 datasheet(408/590 Pages) TOSHIBA

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Chapter 13 Parallel I/O Port

13-2

13.3 Detailed Description

13.3.1

Selecting PIO Pins

All of the 32-bit PIO signals are shared with other functions. The boot configuration signal (TDO)

and pin configuration register (PCFG) determine which functions will be used. See Sections “3.2 Boot

Configuration”, “3.3 Pin Multiplexing” and “5.2.3 Pin Configuration Register” for more information.

13.3.2

General-purpose Parallel Port

The four following registers are used to control the PIO port.

•

PIO Output Data Register (PIODO)

•

PIO Input Data Register (PIODI)

•

PIO Direction Control Register (PIODIR)

•

PIO Open Drain Control Register (PIOOD)

PIO signals can be selected by the PIO Direction Control Register (PIODIR) for each bit as either

input or output.

Signals selected as output signals output the values written into the PIO Data Output Register

(PIODO). The PIO Open Drain Control Register (PIOOD) can select whether each bit is either an open

drain output or a totem pole output.

PIO signal status is indicated by the PIO Data Input Register. This register can be read out at any time

regardless of the pin direction settings.

13.4 Registers

Table 13.4.1 PIO Register Map

Reference

Offset Address

Bit Width

Mnemonic

13.4.1

0xF500

PIODO

PIO Output Data Register

13.4.2

0xF504

PIODI

PIO Input Data Register

13.4.3

0xF508

PIODIR

PIO Direction Control Register

13.4.4

0xF50C

PIOOD

PIO Open Drain Control Register

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