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TMPR4925 Datasheet(PDF) 515 Page - Toshiba Semiconductor |
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TMPR4925 Datasheet(HTML) 515 Page - Toshiba Semiconductor |
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515 / 590 page ![]() Chapter 16 CHI Module 16-33 16.4.13 HI Interrupt Enable Register (CHIINTE) 0xA82C 31 16 Reserved : Type : Initial value 15 87 65 43 21 0 Reserved BUSIE 05IE 10IE DCIE INAIE INBIE ACTIE ERRIE R/W : Type 00000000 : Initial value Bits Mnemonic Field Name Description 31:8 Reserved 7 BUSIE CHIBUSERROR Interrupt Enable CHIBUSERROR Interrupt Enable bits (Initial value: 0, R/W) This bit is used to enable or disable the CHIBUSERROR Interrupt. 0: Disable 1: Enable 6 05IE CHI0_5 Interrupt Enable CHI0_5 Interrupt Enable bits (Initial value: 0, R/W) This bit is used to enable or disable the CHI0_5 Interrupt. 0: Disable 1: Enable 5 10IE CHI1_0 Interrupt Enable CHI1_0 Interrupt Enable bits (Initial value: 0, R/W) This bit is used to enable or disable the CHI1_0 Interrupt. 0: Disable 1: Enable 4DCIE CHIDMACNT Interrupt Enable CHIDMACNT Interrupt Enable bits (Initial value: 0, R/W) This bit is used to enable or disable the CHIDMACNT Interrupt. 0: Disable 1: Enable 3 INAIE CHIININTA Interrupt Enable CHIININTA Interrupt Enable bits (Initial value: 0, R/W) This bit is used to enable or disable the CHIININTA Interrupt. 0: Disable 1: Enable 2 INBIE CHIININTB Interrupt Enable CHIININTB Interrupt Enable bits (Initial value: 0, R/W) This bit is used to enable or disable the CHIININTB Interrupt. 0: Disable 1: Enable 1ACTIE CHIACTINT Interrupt Enable CHIACTINT Interrupt Enable bits (Initial value: 0, R/W) This bit is used to enable or disable the CHIACTINT Interrupt. 0: Disable 1: Enable 0 ERRIE CHIERRINT Interrupt Enable CHIERRINT Interrupt Enable bits (Initial value: 0, R/W) This bit is used to enable or disable the CHIERRINT Interrupt. 0: Disable 1: Enable Figure 16.4.13 CHI Interrupt Enable Register (CHIINTE) |
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