TMPR4925 datasheet(532/590 Pages) TOSHIBA

Part #	TMPR4925

Description	64-Bit TX System RISC TX49 Family

PDF	590 Pages

Scroll/Zoom	100%

Manufacturer	TOSHIBA [Toshiba Semiconductor]

Direct Link	http://www.semicon.toshiba.co.jp/eng

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532 / 590 page

Chapter 17 Serial Peripheral Interface

17-16

17.4.6

SPI Data Register (SPDR)

0xF818

Reserved

: Type

: Initial value

R/W

: Type

0x00

: Initial value

Bits

Mnemonic

Field Name

Explanation

31:16



Reserved



15:0

SPI Data Register

SPI Data Register (Initial value: 0x00, R/W)

A write to the SPDR register writes the value to the transmit buffer. From there, the

data will be transferred to the shift register as soon as SPI module is ready for the

next transfer.

Reading the SPDR register delivers the current value from the receive FIFO and

increments the receive FIFO pointer, if there are other values stored in the FIFO.

For eight bit transfers, only the lower eight bits of the SPDR register are used. The

upper byte, bit 15 to 8, are read “0x0” for eight bit transfers.

For 16 bit transfers all 16 bits of SPDR are used.

Figure 17.4.6 SPI Data Register (SPDR)

TMPR4925 Datasheet(PDF) 532 Page - Toshiba Semiconductor