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TMPR4925 Datasheet(PDF) 565 Page - Toshiba Semiconductor |
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TMPR4925 Datasheet(HTML) 565 Page - Toshiba Semiconductor |
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565 / 590 page  Chapter 21 Extended EJTAG Interface 21-7 21.3 Initializing the Extended EJTAG Interface The Extended EJTAG Interface is not reset by asserting the RESET* signal. Operation of the TX49/H2 core is not guaranteed if the Extended EJTAG Interface is not reset. This interface is initialized by either of the following methods. • Assert the TRST* signal. • After clearing the processor reset, set the TMS input to High for five consecutive rising edges of the TCK input. The reset state is maintained if TMS is able to maintain the High state. The above methods must be performed while the MASTERCLK signal is being input. Also, externally fix the TRST* signal to GND when not using an emulation probe. The G-Bus Time Out Detection function is disabled when the TRST* signal is deasserted. (Refer to Section 5.1.1.) |
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