TMPR4925 datasheet(583/590 Pages) TOSHIBA

583 / 590 page

Chapter 23 Pin Layout, Package

23-3

DATA[25]

DATA[8]

DATA[22]

DATA[21]

DATA[20]

DATA[3]

DATA[17]

Vss

MASTERCLK

Vss

DATA[9]

DATA[23]

DATA[6]

DATA[5]

DATA[4]

DATA[18]

DATA[1]

DATA[0]

PLLVDD

PLLVSS

DATA[24]

DATA[7]

VDDS

VDDC

DATA[19]

DATA[2]

DATA[16]

VDDS

C32KOUT

C32KIN

VDDS

Vss

VDDS

Vss

TEST*

NMI*

BC32K

Vss

PIO[16]

PIO[15]

PIO[14]

PIO[7]

PIO[13]

PIO[17]

PIO[12]

Vss

VDDC

PIO[9]

PIO[8]

PIO[6]

PIO[5]

PIO[10]

PIO[11]

VDDS

PIO[1]

PIO[3]

ACK*

Vss

VDDC

PIO[4]

BUSSPRT

PIO[0]

PIO[2]

CE[1]*

CE[0]*

CE[3]*

CE[2]*

ADDR[15]

OE*

VDDS

ADDR[2]

ADDR[3]

ADDR[4]

Vss

VDDC

ADDR[0]

ADDR[1]

BWE [2]*

BWE [3]*

UAE

SWE*

TOP View VDDS

BWE [0]*

BWE [1]*

SYSCLK

Vss

VDDS

IRDY*

Vss

VDDC

VDDS

Vss

VDDC

PCIAD[7]

PCIAD[3]

VDDC

PCIAD[16] TRDY*

VDDC

PAR

PCIAD[14] PCIAD[11] VDDS

PCIAD[6]

PCIAD[2]

PCIAD[18] C_BE[2]

DEVSEL*

PERR*

C_BE[1]

PCIAD[13] PCIAD[10] PCIAD[8]

PCIAD[5]

PCIAD[1]

PCIAD[17] FRAME*

STOP*

SERR*

PCIAD[15] PCIAD[12] PCIAD[9]

C_BE[0]

PCIAD[4]

PCIAD[0]

Table 23.1.1 Pin layout (2/2)

TMPR4925 Datasheet(PDF) 583 Page - Toshiba Semiconductor

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