MA780 – 8-BIT TO 12-BIT LOW-POWER ANGLE SENSOR

MA780 Rev. 1.2

MonolithicPower.com

14

8/30/2021

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15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

Angle

1

0

0

4

3

2

1

0

7

6

5

4

3

2

1

0

Register Value to Write

/CS

SCLK

MISO

MOSI

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

7

6

5

4

3

2

1

0

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

0x0000

Write Command

Register Address

7

6

5

4

3

2

1

0

Register Value

Angle

tIDLE_WRITE_REG

Figure 18: Overview of Two 16-Bit Frame Write Register Operation

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

Angle

1

0

0

4

3

2

1

0

7

6

5

4

3

2

1

0

/CS

SCLK

MISO

MOSI

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

7

6

5

4

3

2

1

0

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

0x0000

Write Command

9

7

6

5

4

3

2

1

0

128 (0x80)

Angle

128 (0x80)

tIDLE_WRITE_REG

Figure 19: Write Output Rotation Direction (RD) to Counterclockwise (High), on Register 9, Bit 7

Non-Voltage Memory (NVM) Operations

The sensor contains non-volatile memory (NVM)

to store the chip configurations during shutdown.

The values stored in the NVM are automatically

loaded into the sensor

’s registers during start-up.

It is also possible to manually force the

restoration of the NVM values to the registers by

using the Restore All Register Values SPI

command.

The registers can be copied to the NVM using

two SPI commands:

1. Store a Single Register to NVM

2. Store All Registers to NVM

The NVM is guaranteed to handle 1,000 write

cycles at 25°C.

Users must first write the desired configuration to

the

registers

by

using

the

write

register

commands, and then call one of the store

commands to save one or all registers to the

NVM.

These commands are ignored if the NVM is busy

executing a previously received command. To

check that the NVM is available and ready to

receive a new command, check the NVM pin

level.

The NVM pin is set to high when the NVM is busy.

Store and restore commands are processed

when the NVM pin is cleared (low) (see Figure

20).

NVM

SPI

NVM

Idle

NVM

Busy

NVM

Idle

Store/restore NVM

command

Ready for next

NVM command

Not responding to

NVM command

Figure 20: Signal Timing for NVM Access

SPI Store a Single Register to NVM

The current value of a specific register can be

stored in the NVM. This command is ignored if

the NVM is busy executing a previously received

command (see Figure 21).