XRT86VL34 datasheet(98/156 Pages) EXAR

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XRT86VL34

QUAD T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION

REV. V1.2.0

Rx OOF

State

Change

RUR/

Change in Receive Out of Frame Defect Condition Interrupt Status.

This Reset-Upon-Read bit field indicates whether or not the “Change in Receive

Out of Frame Defect Condition” interrupt has occurred since the last read of this

Out of Frame defect condition is declared when “TOLR” out of “RANG” errors in

the framing bit pattern is detected. (Register 0xn10B)

If this interrupt is enabled, then the Receive T1 Framer block will generate an

interrupt in response to either one of the following conditions.

1. Whenever the Receive T1 Framer block declares the Out of Frame defect

condition.

2. Whenever the Receive T1 Framer block clears the Out of Frame defect

condition

0 = Indicates that the “Change in Receive Out of Frame defect condition” interrupt

has not occurred since the last read of this register

1 = Indicates that the “Change in Receive Out of Frame defect condition” interrupt

has occurred since the last read of this register

RxAIS State

Change

RUR/

Change in Receive AIS Condition Interrupt Status.

This Reset-Upon-Read bit field indicates whether or not the “Change in Receive

AIS Condition” interrupt has occurred since the last read of this register.

If this interrupt is enabled, then the Receive T1 Framer block will generate an

interrupt in response to either one of the following conditions.

1. Whenever the Receive T1 Framer block declares the AIS condition.

2. Whenever the Receive T1 Framer block clears the AIS condition

0 = Indicates that the “Change in Receive AIS condition” interrupt has not

occurred since the last read of this register

1 = Indicates that the “Change in Receive AIS condition” interrupt has occurred

since the last read of this register

RxYEL State

Change

RUR/

Change in Receive Yellow Alarm Interrupt Status.

This Reset-Upon-Read bit field indicates whether or not the “Change in Receive

Yellow Alarm Condition” interrupt has occurred since the last read of this register.

If this interrupt is enabled, then the Receive T1 Framer block will generate an

interrupt in response to either one of the following conditions.

1. Whenever the Receive T1 Framer block declares the Yellow Alarm

condition.

2. Whenever the Receive T1 Framer block clears the Yellow Alarm condition

0 = Indicates that the “Change in Receive Yellow Alarm condition” interrupt has

not occurred since the last read of this register

1 = Indicates that the “Change in Receive Yellow Alarm condition” interrupt has

occurred since the last read of this register

TABLE 80: ALARM & ERROR INTERRUPT STATUS REGISTER (AEISR)

HEX ADDRESS: 0XnB02

BIT

FUNCTION

TYPE

DEFAULT

DESCRIPTION-OPERATION

XRT86VL34 Datasheet(PDF) 98 Page - Exar Corporation

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