XRT86VL34 datasheet(81/156 Pages) EXAR

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XRT86VL34

REV. V1.2.0

QUAD T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION

3-2

RxSIGC[1:0]]

R/W

Signaling conditioning [1:0]

These bits allow user to select the format of signaling substitution on

a per-channel basis, as presented in the table below.

1-0

RxSIGE[1:0]

R/W

Receive Signaling Extraction [1:0]

These bits control per-channel signaling extraction as presented in

the table below. Signaling information can be extracted to the

Receive Signaling Array Register (RSAR), the Receive Signaling

Output pin (RxSIG_n) if the Receive SIgnaling Interface is enable,

or the Receive Overhead Interface output (RxOH_n) if OH_ENB bit

is enabled. (bit 5 of this register).

TABLE 55: RECEIVE SIGNALING CONTROL REGISTER 0-23 (RSCR 0-23)

HEX ADDRESS: 0Xn3A0 TO 0XN3B7

BIT

FUNCTION

TYPE

DEFAULT

DESCRIPTION-OPERATION

RXSIGC[1:0]

SIGNALING SUBSTITUTION SCHEMES

Substitutes all signaling bits with one.

Enables 16-code (A,B,C,D) signaling substi-

tution.

Users must write to bits 3-0 in the Receive Sig-

naling Substitution Register (RSSR) to provide

the 16-code (A,B,C,D) signaling substitution val-

ues.

Enables 4-code (A,B) signaling substitution.

Users must write to bits 4-5 in the Receive Sig-

naling Substitution Register (RSSR) to provide

the 4-code (A,B) signaling substitution values.

Enables 2-code (A) signaling substitution.

Users must write to bit 6 in the Receive Signal-

ing Substitution Register (RSSR) to provide the

2-code (A) signaling substitution values.

RXSIGE[1:0]

SIGNALING EXTRACTION SCHEMES

No signaling information is extracted.

Enables 16-code (A,B,C,D) signaling

extraction.

All signaling bits A,B,C,D will be extracted.

Enables 4-code (A,B) signaling extraction

Only signaling bits A,B will be extracted.

Enables 2-code (A) signaling extraction

Only signaling bit A will be extracted.

XRT86VL34 Datasheet(PDF) 81 Page - Exar Corporation

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