XRT86VL34 datasheet(78/156 Pages) EXAR

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XRT86VL34

QUAD T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION

REV. V1.2.0

3-0

RxCOND[3:0]

R/W

0000

Receive Channel Conditioning for Timeslot 0 to 23

These bits allow the user to substitute the input line data (Octets 0-23) with

internally generated Conditioning Codes prior to transmission to the back-

plane interface on a per-channel basis. The table below presents the differ-

ent conditioning codes based on the setting of these bits.

NOTE:

0xn317 represents time slot 23.

TABLE 53: RECEIVE CHANNEL CONTROL REGISTER 0-23 (RCCR 0-23)

HEX ADDRESS: 0Xn360 TO 0XN377

BIT

FUNCTION

TYPE

DEFAULT

DESCRIPTION-OPERATION

RXCOND[1:0]

CONDITIONING CODES

0x0 / 0xE

Contents of timeslot octet are unchanged.

0x1

All 8 bits of the selected timeslot octet are inverted (1’s

complement)

OUTPUT = (TIME_SLOT_OCTET) XOR 0xFF

0x2

Even bits of the selected timeslot octet are inverted

OUTPUT = (TIME_SLOT_OCTET) XOR 0xAA

0x3

Odd bits of the selected time slot octet are inverted

OUTPUT = (TIME_SLOT_OCTET) XOR 0x55

0x4

Contents of the selected timeslot octet will be substituted

with the 8 -bit value in the Receive

Programmable User Code Register (0xn380-0xn397),

0x5

Contents of the timeslot octet will be substituted with the

value 0x7F (BUSY Code)

0x6

Contents of the timeslot octet will be substituted with the

value 0xFF (VACANT Code)

0x7

Contents of the timeslot octet will be substituted with the

BUSY time slot code (111#_####), where ##### is the

Timeslot number

0x8

Contents of the timeslot octet will be substituted with the

MOOF code (0x1A)

0x9

Contents of the timeslot octet will be substituted with the

A-Law Digital Milliwatt pattern

0xA

Contents of the timeslot octet will be substituted with the

μ-Law Digital Milliwatt pattern

0xB

The MSB (bit 1) of input data is inverted

0xC

All input data except MSB is inverted

0xD

Contents of the timeslot octet will be substituted with the

PRBS X15 + X 14 + 1/QRTS pattern

NOTE: PRBS X15 + X 14 + 1 or QRTS pattern depends on

PRBSType selected in the register 0xn123 - bit 7

0xF

D/E time slot - The RxDE[2:0] bits in the Transmit Signal-

ing and Data Link Select Register (0xn10C) will determine

the data source for Receive D/E time slots.

XRT86VL34 Datasheet(PDF) 78 Page - Exar Corporation

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