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XRT86VL34 Datasheet(PDF) 55 Page - Exar Corporation |
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XRT86VL34 Datasheet(HTML) 55 Page - Exar Corporation |
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55 / 156 page ![]() XRT86VL34 50 REV. V1.2.0 QUAD T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION 1-0 RxIMODE[1:0] R/W 00 Receive Interface Mode Selection[1:0] This bit determines the receive backplane interface speed. The exact func- tion of these two bits depends on whether Receive Multiplexed mode is enabled or disabled. Table 33 and Table 34 shows the functions of these two bits for non-multiplexed and multiplexed modes.: TABLE 32: RECEIVE INTERFACE CONTROL REGISTER (RICR) HEX ADDRESS: 0XN122 BIT FUNCTION TYPE DEFAULT DESCRIPTION-OPERATION TABLE 33: RECEIVE INTERFACE SPEED WHEN MULTIPLEXED MODE IS DISABLED (TXMUXEN = 0) RXIMODE[1:0] RECEIVE INTERFACE SPEED 00 1.544Mbit/s Base Rate Mode Receive backplane interface signals include: RxSERCLK is an input or output clock at 1.544MHz RxSYNC is an input or output signal which indicates the receive singe frame boundary RxSER is the base-rate data output 01 2.048Mbit/s High-Speed MVIP Mode: Receive backplane interface signals include: RxSERCLK is an input clock at 2.048MHz RxSYNC is an input signal which indicates the receive singe frame boundary RxSER is the high-speed data output 10 4.096Mbit/s High-Speed Mode: Receive backplane interface signals include: RxSERCLK is an input clock at 4.096MHz RxSYNC is an input signal which indicates the receive singe frame boundary RxSER is the high-speed data output 11 8.192Mbit/s High-Speed Mode: Receive backplane interface signals include: RxSERCLK is an input clock at 8.192MHz RxSYNC is an input signal which indicates the receive singe frame boundary RxSER is the high-speed data output |
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