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TMS320DM355 Datasheet(PDF) 44 Page - Texas Instruments

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Part # TMS320DM355
Description  Digital Media System-on-Chip (DMSoC)
PDF  153 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TMS320DM355 Datasheet(HTML) 44 Page - Texas Instruments

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TMS320DM355
Digital Media System-on-Chip (DMSoC)
SPRS463 – SEPTEMBER 2007
Table 2-23. DM355 Pin Descriptions (continued)
Name
Pin
BGA
Type
Grou
Power
PU
Reset
Description(4)
Mux Control
#
ID
(1)
p
Supply(2)
PD(3
State
)
EM_A11 /
110
R16
I/O
AEMI
VDD
PU
in H
Async EMIF: Address Bus bit[11]
PINMUX2[0].EM_A
GIO065 /
F /
13_3,
AECFG[3]
GIO /
syste
m
GIO: GIO[065]
default set by
AECFG[0]
System: AECFG[3:0] sampled at
Power-on-Reset to set AEMIF
Configuration
AECFG[3] sets default for
PinMux2.EM_D15_8: AEMIF Default Bus
Width (0:16 or 1:8 bits)
EM_A10 /
111
R18
I/O
AEMI
VDD
PU
in H
Async EMIF: Address Bus bit[10]
PINMUX2[0].EM_A
GIO064 /
F /
13_3,
AECFG[2]
GIO /
syste
m
GIO: GIO[064]
default set by
AECFG[0]
System: AECFG[3:0] sampled at
Power-on-Reset to set AEMIF
Configuration
AECFG[2:1] sets default for
PinMux2.EM_BA0: AEMIF EM_BA0
Definition (00: EM_BA0, 01: EM_A14,
10:GIO[054], 11:rsvd)
EM_A09 /
112
P17
I/O
AEMI
VDD
PD
in L
Async EMIF: Address Bus bit[09]
PINMUX2[0].EM_A
GIO063 /
F /
13_3,
AECFG[1]
GIO /
syste
m
GIO: GIO[063]
default set by
AECFG[0]
System: AECFG[3:0] sampled at
Power-on-Reset to set AEMIF
Configuration
AECFG[2:1] sets default for
PinMux2.EM_BA0: AEMIF EM_BA0
Definition (00: EM_BA0, 01: EM_A14,
10:GIO[054], 11:rsvd)
EM_A08 /
113
T19
I/O
AEMI
VDD
PU
in H
Async EMIF: Address Bus bit[08]
PINMUX2[0].EM_A
GIO062 /
F /
13_3,
AECFG[0]
GIO /
syste
m
GIO: GIO[062]
default set by
AECFG[0]
AECFG[0] sets default for
- PinMux2.EM_A0_BA1: AEMIF Address
Width (OneNAND or NAND)
- PinMux2.EM_A13_3: AEMIF Address
Width (OneNAND or NAND)
(0:AEMIF address bits, 1:GIO[67:57])
Device Overview
44
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