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TMS320DM355 Datasheet(PDF) 97 Page - Texas Instruments |
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TMS320DM355 Datasheet(HTML) 97 Page - Texas Instruments |
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97 / 153 page ![]() www.ti.com 5.4 Reset 5.4.1 Reset Electrical Data/Timing 1 2 3 RESET BootConfigurationPins (BTSEL[1:0],AECFG[3:0]) TMS320DM355 Digital Media System-on-Chip (DMSoC) SPRS463 – SEPTEMBER 2007 Table 5-2. Timing Requirements for Reset (1)(2) (see Figure 5-4) DM355 NO. UNIT MIN MAX 1 tw(RESET) Active low width of the RESET pulse 12C ns 2 tsu(BOOT) Setup time, boot configuration pins valid before RESET rising edge 12C ns 3 th(BOOT) Hold time, boot configuration pins valid after RESET rising edge 12C ns (1) BTSEL[1:0] and AECFG[4:0] are the boot configuration pins during device reset. (2) C = MXI/CLKIN cycle time in ns. For example, when MXI/CLKIN frequency is 24 MHz use C = 41.6 ns. Figure 5-4. Reset Timing Submit Documentation Feedback Peripheral Information and Electrical Specifications 97 |
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