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TMS320DM355 Datasheet(PDF) 70 Page - Texas Instruments |
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TMS320DM355 Datasheet(HTML) 70 Page - Texas Instruments |
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70 / 153 page ![]() www.ti.com TMS320DM355 Digital Media System-on-Chip (DMSoC) SPRS463 – SEPTEMBER 2007 Table 3-8. PLL1 Supported Clocking Configurations for DM355 - 270 (36 MHz reference) PREDI PLLM POSTDI PLL1 ARM / Peripherals Venc VPSS V V VCO MPEG and JPEG Co-Processor (/8 (m (/2 fixed) (MHz) PLLDIV SYSC PLLDIV SYSCLK2 PLLDIV3 SYSCL PLLDIV4 SYSCLK4 fixed) programmable) 1 LK1 2 (MHz) (/n K3 (/2 fixed) (MHz) (/2 (MHz) (/4 programmable) (MHz) fixed) fixed) bypas bypass bypass bypas 2 18 4 9 10 3.6 4 18 s s 8 120 1 540 2 270 4 135 20 27 4 135 8 114 1 513 2 256.5 4 128.25 19 27 4 128.25 8 108 1 486 2 243 4 121.5 18 27 4 121.5 8 102 1 459 2 229.5 4 114.75 17 27 4 114.75 8 96 2 432 2 216 4 108 16 27 4 108 8 180 2 405 2 202.5 4 101.25 15 27 2 202.5 8 168 2 378 2 189 4 94.5 14 27 2 189 8 156 2 351 2 175.5 4 87.75 13 27 2 175.5 8 144 2 324 2 162 4 81 12 27 2 162 8 132 2 297 2 148.5 4 74.25 11 27 2 148.5 8 120 2 270 2 135 4 67.5 10 27 2 135 8 108 2 243 2 121.5 4 60.75 9 27 2 121.5 8 96 2 216 2 108 4 54 8 27 2 108 Detailed Device Description 70 Submit Documentation Feedback |
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