| Electronic Components Datasheet Search |
|
PM7347 Datasheet(PDF) 163 Page - PMC-Sierra, Inc |
|
|
|||||||||||||||||||||||||||||
PM7347 Datasheet(HTML) 163 Page - PMC-Sierra, Inc |
|
163 / 341 page ![]() S/UNI®-JET Data Sheet Released Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use 163 Document ID: PMC-1990267, Issue 3 Register 346H: J2-FRMR Alarm Interrupt Enable Bit Type Function Default Bit 7 R/W LOSE 0 Bit 6 R/W LOFE 0 Bit 5 R/W COFAE 0 Bit 4 R/W RAIE 0 Bit 3 R/W RLOFE 0 Bit 2 R/W RLOF_THR 1 Bit 1 R/W PHYAISE 0 Bit 0 R/W PLDAISE 0 LOSE When LOSE is logic one, the J2-FRMR will generate an interrupt when the LOS condition changes state. Note: The LOS bit is not valid when the UNI bit is set in the J2-FRMR Configuration Register. LOFE When LOFE is logic one, the J2-FRMR will generate an interrupt when LOF changes state. COFAE When COFAE is logic one, the J2-FRMR will generate an interrupt when a change of frame alignment occurs. RAIE When RAIE is logic one, the J2-FRMR will generate an interrupt when RAI changes state. RLOFE When RLOFE is logic one, the J2-FRMR will generate an interrupt when RLOF changes state. |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |