PM7347 datasheet(160/341 Pages) PMC

160 / 341 page

S/UNI®-JET Data Sheet

Released

Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use

160

Document ID: PMC-1990267, Issue 3

Bit

Type

Function

Default

Bit 7

Unused

Bit 6

R/W

UNI

Bit 5

R/W

REFRAME

Bit 4

R/W

FLOCK

Bit 3

R/W

CRC_REFR

Bit 2

R/W

SFRME

Bit 1

R/W

LOSTHR[1]

Bit 0

R/W

LOSTHR[0]

UNI

When the UNI bit is set to logic zero, the J2-FRMR expects unipolar data on the RDATI

input and LCV indications on the RLCV input. When UNI is logic zero, the J2-FRMR

expects bipolar B8ZS encoded data on the RPOS and RNEG inputs. When UNI is set to logic

one, then the LOS, LOSI, and EXZI indications cannot be used.

REFRAME

Writing the REFRAME bit logic one forces the J2-FRMR to declare LOF, and begin

searching for a new alignment. In order to force another reframe, REFRAME must be written

with logic zero, and then logic one again.

FLOCK

When the FLOCK bit is set to logic one, the J2-FRMR is prevented from declaring LOF and

searching for a new frame alignment due to framing-pattern errors. In this case, the J2-FRMR

will only search for frame alignment when the REFRAME register bit transitions from logic

zero to logic one.

CRC_REFR

When the CRC Reframe Enable bit is set to logic one, an alternate framing algorithm is

enabled, which uses the CRC-5 check to detect framing to a mimic pattern in the payload or

signaling bits. The framer, once it has seen at least one correct framing pattern, begins

looking for correct CRC-5s as well. If it observes three consecutive correct framing patterns,

and two correct CRC-5 sequences, then frame is declared. Otherwise, a reframe is initiated.

When CRC_REFR is set to logic zero, the framing algorithm simply searches for three

consecutive correct framing patterns.

PM7347 Datasheet(PDF) 160 Page - PMC-Sierra, Inc

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