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PCA9665D Datasheet(PDF) 67 Page - NXP Semiconductors |
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PCA9665D Datasheet(HTML) 67 Page - NXP Semiconductors |
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67 / 91 page ![]() PCA9665_2 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 02 — 7 December 2006 67 of 91 NXP Semiconductors PCA9665 Fm+ parallel bus to I2C-bus controller 10. Application design-in information 10.1 Specific applications The PCA9665 is a parallel bus to I2C-bus controller that is designed to allow ‘smart’ devices to interface with I2C-bus or SMBus components, where the ‘smart’ device does not have an integrated I2C-bus port and the designer does not want to ‘bit-bang’ the I2C-bus port. The PCA9665 can also be used to add more I2C-bus ports to ‘smart’ devices, provide a higher frequency, lower voltage migration path for the PCF8584 and convert 8 bits of parallel data to a serial bus to avoid running multiple traces across the printed-circuit board. 10.2 Add I2C-bus port As shown in Figure 33, the PCA9665 converts 8-bits of parallel data into a multiple master capable I2C-bus port for microcontrollers, microprocessors, custom ASICs, DSPs, etc., that need to interface with I2C-bus or SMBus components. Fig 32. Application diagram using the 80C51 002aab035 PCA9665 80C51 DECODER D0 to D7 ALE CE RD WR INT A0 SCL SDA A1 RESET SLAVE INT RESET address bus VDD VDD 8 VSS VDD VDD VDD VSS SLAVE |
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