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PCA9665D Datasheet(PDF) 32 Page - NXP Semiconductors |
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PCA9665D Datasheet(HTML) 32 Page - NXP Semiconductors |
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32 / 91 page ![]() PCA9665_2 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 02 — 7 December 2006 32 of 91 NXP Semiconductors PCA9665 Fm+ parallel bus to I2C-bus controller • 30h if the slave address with direction bit has been successfully sent and no acknowledgement (NACK) has been received while transmitting the data bytes (number of total bytes sent is lower than or equal to value in I2CCOUNT). • 38h if the PCA9665 lost the arbitration when sending the slave address with the direction bit or when sending data bytes. • B0h if the PCA9665 lost the arbitration and is addressed as a slave transmitter (slave mode enabled with AA = 1). • 68h if the PCA9665 lost the arbitration and is addressed as a slave receiver (slave mode enabled with AA = 1). • D8h if the PCA9665 lost the arbitration and is addressed as a slave receiver during a General Call sequence (slave mode enabled with AA = 1 and General Call address enabled with GC = 1 in I2CADR register). The appropriate action to be taken for each of these status codes is detailed in Table 35. ENSIO is not affected by the serial transfer and is not referred to in Table 35. After a repeated START condition (state 10h), the PCA9665 may switch to the Master Receiver mode by loading I2CDAT with SLA+R). Remark: A master should not transmit its own slave address. |
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