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PM8621 Datasheet(PDF) 132 Page - PMC-Sierra, Inc

Part # PM8621
Description  NSE-8G??Standard Product Data Sheet Preliminary
PDF  184 Pages
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Manufacturer  PMC [PMC-Sierra, Inc]
Direct Link  http://www.pmc-sierra.com
Logo PMC - PMC-Sierra, Inc

PM8621 Datasheet(HTML) 132 Page - PMC-Sierra, Inc

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NSE-8G™ Standard Product Data Sheet
Preliminary
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
131
Document ID: PMC-2010850, Issue 1
Pin/ Enable
Register Bit
Cell Type
I.D. Bit
Logic one
3
IN_CELL
-
Logic one
2
IN_CELL
-
Logic one
1
IN_CELL
-
Logic one
0
IN_CELL
-
Notes
1.
When set high, INTB will be set to high impedance.
2.
Enable cell OEB_pinname, tristates pin pinname when set high.
3.
OEB_INTB is the first bit of the boundary scan chain.
4.
Cells ‘Logic one’ are Input Observation cells whose input pad is bonded to VDD internally.
11.2.1 Boundary Scan Cells
In the following diagrams, CLOCK-DR is equal to TCK when the current controller state is
SHIFT-DR or CAPTURE-DR, and unchanging otherwise. The multiplexer in the center of the
diagram selects one of four inputs, depending on the status of select lines G1 and G2. The ID
Code bit is as listed in the Boundary Scan Register, Table 14.
Figure 13 Input Observation Cell (IN_CELL)
Input
Pad
D
C
CLOCK-DR
Scan Chain Out
INPUT
to internal
logic
SHIFT-DR
Scan Chain In
1 2
MUX
1 2
1 2
1 2
I.D. Code bit
IDCODE
G1
G2



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