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PM8621 Datasheet(PDF) 151 Page - PMC-Sierra, Inc |
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PM8621 Datasheet(HTML) 151 Page - PMC-Sierra, Inc |
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151 / 184 page ![]() NSE-8G™ Standard Product Data Sheet Preliminary Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use 150 Document ID: PMC-2010850, Issue 1 1. Write 00000001h to the ILC Transmit Misc. Status and FIFO Synch register to initiate a new message write sequence (TX_XFER_SYNC). 2. Loop through the next two operations until the message is transferred. 3. Write the Transmit FIFO Data register. 4. Wait for the TX_FI_BUSY bit to be logic zero (read ILC Transmit Misc. Status and FIFO Synch register) or wait for three SYSCLK Cycles and then continue. This wait time can be used to access other registers, just as long as the Transmit FIFO Data register is not changed during this time. Notes on Using the TX_XFER_SYNC If all messages transmitted are eight Dwords in length, then writing the TX_XFER_SYNC bit is optional. When transmitting a message immediately following a short message, writing the TX_XFER_SYNC bit is mandatory. When transmitting messages longer than eight Dwords, writing the TX_XFER_SYNC bit every eight Dwords is optional. 12.12.2 Accessing the Receive Message FIFO Access the registers in the following order: This procedure is outline only. Full operation is shown in the code snippet below. 1. Write 00000001h to the Receive Auxiliary, Status and FIFO Synch register to initiate a new message read sequence. 2. Loop through the next two operations until message is transferred. 3. Read the Receive FIFO Data register. 4. Wait for the busy bit to equal ‘0’ (Read Receive Status register Ah) or wait for three SYSCLK Cycles and then continue. This wait time can be utilized accessing other registers, just as long as the Receive FIFO Data register is not read again during this time. The following psuedo code shows the recommended procedure for accessing the receive message FIFO. PROCEDURE Message_Receive IS VARIABLE dword_rd_cnt : NATURAL := 0; VARIABLE msg_done : BOOLEAN := false; VARIABLE polled_rx_mode : BOOLEAN := false; VARIABLE msg_lvl_loop : NATURAL := 0; VARIABLE msgs_rd : NATURAL := 0; BEGIN -- |
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