TMPR4956C datasheet(201/286 Pages) TOSHIBA

201 / 286 page

Chapter 11 TX4956 System Interface

11-33

11.2.14 Data Error Detection

The TX4956 internal system interface uses the following two methods to detect data errors:

•

Indication of good data by data identifier SysCmd[5]

•

Determination by a check bit

11.2.14.1 Indication of good data by data identifier SysCmd[5]

This bit indicates whether data is good or not for all data. Therefore, in a block refill transfer, for

example, no matter in what number of data SysCmd[5] may have been set, a bus error exception is

always generated.

11.2.14.2 Determination by a check bit

When an error is detected by check bit determination, a bus error exception occurs. Because this

determination also is made for all data, no matter in what number of data in a block refill transfer an

error may have occurred, a bus error exception is always generated.

11.2.14.3 Timing at which a bus error exception occurs

Indication of good data (SysCmd[5]): Two cycles after read response data

Check bit error detection: Three cycles after read response data

11.2.14.4 Precautions

•

There is no means of identifying whether a bus error exception has been generated by

indication of good data or by check bit determination. Nor does the TX49/H4 core have a cache

parity bit, but when a bus error exception occurs during a block refill transfer, the cache line is

referenced INVALID.

•

Regardless of whether a bus error exception has been generated by indication of good data or

by check bit determination during a block refill transfer, a designated block size of data needs

to be transferred.

TMPR4956C Datasheet(PDF) 201 Page - Toshiba Semiconductor