TMPR4956C datasheet(203/286 Pages) TOSHIBA

203 / 286 page

Chapter 11 TX4956 System Interface

11-35

Signal Name

Pin No.

I/O

Function

SysCmd[8:5]

R9, P9, R8,

I/O

Reserved

These pins are always driven to 0, then, can be left open on the board

SysCmd[4:0]

R7, P7, R6,

P6, R5

I/O

System command/data identifier bus

A 5-bit bus for command and data identifier transmission between the processor and

an external agent.

SysADC[7:0]

N5, N4, N6,

N9, C14,

D14, C9,

C13

I/O

Reserved

These pins are always driven to 0, then, can be left open on the board

SysCmdP

I/O

Reserved

This pin is always driven to 0, then, can be left open on the board

Evalid*

External agent valid input

During the cycle it is asserted, EValid* indicates an external agent is driving a valid

address or valid data on the SysAD bus, and a valid command or data identifier on the

SysCmd bus.

Pvalid*

Processor valid output

During the cycle it is asserted, PValid*, indicates the processor is driving a Valid

address or Valid data on the SysAD bus, and a valid command or data indentifier on

the SysCmd bus.

EReq*

R12

External request

Indicates an external agent is requesting System interface bus ownership.

PMaster*

Processor Master

This signal indicates that the processor is a bus master.

EOK*

External agent Ready

An external agent asserts EOK* when an external agent can now accept a processor

request.

RdRdy*

Reserved

There is a pull-down resistor in the circuit. Then you can left it open or set it to 0.

TMPR4956C Datasheet(PDF) 203 Page - Toshiba Semiconductor

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