TMPR4956C datasheet(244/286 Pages) TOSHIBA

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Chapter 14 JTAG Interface

14-6

The Boundary-scan register is a single, 236-bit-wide, shift register-based path containing cells

connected to all input and output pads on the TX4956 processor.

235

See BSDL file in detail attached in the production

Figure 14.3.4 Format of the Boundary-scan Register

28 bits (SysEN) of the BSR are JTAG output enables.

205 bits of the BSR are for 117 external signals of the processor.

3 bits of the BSR are for internal signals of the processor.

At the end of this chapter, Table 14.3.2 lists the scan order of these 236 scan bits, starting from JTDI

and ending with JTDO.

The JTDI input is loaded to the MSB of the Boundary Scan register. The LSB of the Boundary Scan

14.3.4

Device Identification Register

The Device Identification register is a 32-bit shift register. It is used to read serially from the IC the

identification code indicating the IC manufacturer, product number, and version.

The following shows the Device Identification register structure.

28 27

12 11

Version

Product number

manufacturer

identification code

4 bits

16 bits

11 bits

Figure 14.3.5 Device Identification Register

The TX4956 device identification code is 0x0002c031.

The device identification code is shifted out starting from the LSB.

Figure 14.3.6 Devide Identification Register shift Direction

LSB

JTDO

MSB

TMPR4956C Datasheet(PDF) 244 Page - Toshiba Semiconductor