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TMPR4956C Datasheet(PDF) 254 Page - Toshiba Semiconductor

Part # TMPR4956C
Description  64-Bit TX System RISC TX49 Family
PDF  286 Pages
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Manufacturer  TOSHIBA [Toshiba Semiconductor]
Direct Link  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TMPR4956C Datasheet(HTML) 254 Page - Toshiba Semiconductor

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Chapter 15 CPU Instruction Set Summary
15-2
15.3 Instruction Set Overview
15.3.1
Load and Store Instructions (Table 15.3.1)
Load and Store instructions move data between memory and general purpose registers, and are all
I-type instructions. The only directly supported addressing mode is “base register plus 16-bit signed
immediate offset”.
Table 15.3.1 CPU Instruction Set: Load and Store Instructions
Instruction
Description
Note
LB
Load Byte
MIPS I
LBU
Load Byte Unsigned
MIPS I
LH
Load Halfword
MIPS I
LHU
Load Halfword Unsigned
MIPS I
LW
Load Word
MIPS I
LWL
Load Word Left
MIPS I
LWR
Load Word Right
MIPS I
SB
Store Byte
MIPS I
SH
Store Halfword
MIPS I
SW
Store Word
MIPS I
SWL
Store Word Left
MIPS I
SWR
Store Word Right
MIPS I
LD
Load Doubleword
MIPS III
LDL
Load Doubleword Left
MIPS III
LDR
Load Doubleword Right
MIPS III
LL
Load Linked
MIPS II
LLD
Load Linked Doubleword
MIPS III
LWU
Load Word Unsigned
MIPS III
SC
Store Conditional
MIPS II
SCD
Store Conditional Doubleword
MIPS III
SD
Store Doubleword
MIPS III
SDL
Store Doubleword Left
MIPS III
SDR
Store Doubleword Right
MIPS III
SYNC
Sync
MIPS II



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