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TMPR4956C Datasheet(PDF) 255 Page - Toshiba Semiconductor |
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TMPR4956C Datasheet(HTML) 255 Page - Toshiba Semiconductor |
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255 / 286 page ![]() Chapter 15 CPU Instruction Set Summary 15-3 15.3.2 Computational Instructions (Table 15.3.2) Computational instructions perform arithmetic, logical or shift operations on values in registers. This instruction format can be R-type or I-type. With R-type instructions, the one or two source operands are computed and its result is saved to one destination register. With I-type instructions, one of the operands is 16-bit immediate data. Computational instructions can be classified as follows. • ALU immediate • Three-operand register-type • Shift • Multiply/Divide Table 15.3.2 CPU Instruction Set: Computational Instructions Instruction Description Note (ALU Immediate) ADDI Add Immediate MIPS I ADDIU Add Immediate Unsigned MIPS I SLTI Set on Less Than Immediate MIPS I SLTIU Set on Less Than Immediate Unsigned MIPS I ANDI AND Immediate MIPS I ORI OR Immediate MIPS I XORI Exclusive OR Immediate MIPS I LUI Load Upper Immediate MIPS I DADDI Doubleword Add Immediate MIPS III DADDIU Doubleword Add Immediate Unsigned MIPS III (ALU 3-Operand, register type) ADD Add MIPS I ADDU Add Unsigned MIPS I SUB Subtract MIPS I SUBU Subtract Unsigned MIPS I SLT Set on Less Than MIPS I SLTU Set on Less Than Unsigned MIPS I AND AND MIPS I OR OR MIPS I XOR Exclusive OR MIPS I NOR NOR MIPS I DADD Doubleword Add MIPS III DADDU Doubleword Add Unsigned MIPS III DSUB Doubleword Subtract MIPS III DSUBU Doubleword Subtract Unsigned MIPS III (Shift) SLL Shift Left Logical MIPS I SRL Shift Right Logical MIPS I SRA Shift Right Arithmetic MIPS I SLLV Shift Left Logical Variable MIPS I SRLV Shift Right Logical Variable MIPS I SRAV Shift Right Arithmetic Variable MIPS I DSLL Doubleword Shift Left Logical MIPS III DSRL Doubleword Shift Right Logical MIPS III DSRA Doubleword Shift Right Arithmetic MIPS III DSLLV Doubleword Shift Left Logical Variable MIPS III DSRLV Doubleword Shift Right Logical Variable MIPS III |
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