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13892 Datasheet(PDF) 63 Page - Freescale Semiconductor, Inc

Part # 13892
Description  Power Management Integrated Circuit (PMIC) for i.MX35/51
PDF  158 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

13892 Datasheet(HTML) 63 Page - Freescale Semiconductor, Inc

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FUNCTIONAL DEVICE OPERATION
OPERATING MODES
Analog Integrated Circuit Device Data
Freescale Semiconductor
63
MC13892
The power up sequence is shown in Table 27. VCOREDIG, VSRTC, and VCORE are brought up in the pre-sequencer startup.
Once VCOREDIG is activated (i.e., at the first-time power application), it will be continuously powered as long as a valid coin cell
is present.
Table 26. Power Up Defaults Table
i.MX
37/51
37/51
37/51
37/51
35
27/31
PUMS1
GND
Open
VCOREDIG
VCORE
GND
Open
PUMS2
OpenOpenOpenOpen
GND
GND
SW1 (49)
0.775
1.050
1.050
0.775
1.200
1.200
SW2 (49)
1.025
1.225
1.225
1.025
1.350
1.450
SW3 (49)
1.200
1.200
1.200
1.200
1.800
1.800
SW4 (49)
1.800
1.800
1.800
1.800
1.800
1.800
SWBST
Off
Off
Off
Off
5.000
5.000
VUSB
3.300 (50)
3.300 (50)
3.300 (50)
3.300 (50)
3.300 (52)
3.300 (52)
VUSB2
2.600
2.600
2.600
2.600
2.600
2.600
VPLL
1.800
1.800
1.800
1.800
1.500
1.500
VDIG
1.250
1.250
1.250
1.250
1.250
1.250
VIOHI
2.775
2.775
2.775
2.775
2.775
2.775
VGEN2
3.150
Off
3.150
Off
3.150
3.150
VSD
Off
Off
Off
Off
3.150
3.150
Notes
49.
The switchers SWx are activated in PWM pulse skipping mode, but allowed when enabled by the startup sequencer.
50.
USB supply VUSB, is only enabled if 5.0 V is present on UVBUS.
51.
The following supplies are not included in the matrix since they are not intended for activation by the startup sequencer: VCAM, VGEN1,
VGEN3, VVIDEO, and VAUDIO
52.
SWBST = 5.0 V powers up and does VUSB regardless of 5.0 V present on UVBUS. By default VUSB will be supplied by SWBST.
Table 27. Power Up Sequence
Tap x 2ms
PUMS2 = Open (i.MX37, i.MX51)
PUMS2 = GND (i.MX35, i.MX27)
0
SW2
SW2
1
SW4
VGEN2
2
VIOHI
SW4
3
VGEN2
VIOHI, VSD
4
SW1
SWBST, VUSB (56)
5
SW3
SW1
6
VPLL
VPLL
7
VDIG
SW3
8
-
VDIG
9
VUSB (55), VUSB2
VUSB2
Notes
53.
Time slots may be included for blocks which are defined by the PUMS pin as disabled to allow for potential activation.
54.
The following supplies are not included in the matrix since they are not intended for activation by the startup sequencer: VCAM,
VGEN1, VGEN3, VVIDEO, and VAUDIO. SWBST is not included on the PUMS2 = Open column.
55.
USB supply VUSB, is only enabled if 5.0 V is present on UVBUS.
56.
SWBST = 5.0 V powers up and so does VUSB regardless of 5.0 V present on UVBUS. By default VUSB will be supplied by SWBST.



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