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13892 Datasheet(PDF) 64 Page - Freescale Semiconductor, Inc

Part # 13892
Description  Power Management Integrated Circuit (PMIC) for i.MX35/51
PDF  158 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

13892 Datasheet(HTML) 64 Page - Freescale Semiconductor, Inc

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FUNCTIONAL DEVICE OPERATION
OPERATING MODES
Analog Integrated Circuit Device Data
64
Freescale Semiconductor
MC13892
POWER MONITORING
The voltage at BPSNS and BP is monitored by detectors as summarized in Table 28.
The UVDET and BPON thresholds are related to the power on/off events as described earlier in this chapter. The LOBATH
threshold is used as a weak battery warning. An interrupt LOBATHI is generated when crossing the threshold (dual edge). The
LOBATL threshold is used as a low battery detect. An interrupt LOBATLI is generated when dropping below the threshold. The
sense bits are coded in line with previous generation parts.
POWER SAVING
SYSTEM STANDBY
A product may be designed to go into DSM after periods of inactivity, such as if a music player completes a play list and no
further activity is detected, or if a gaming interface sits idle for an extended period. Two Standby pins are provided for board level
control of timing in and out of such deep sleep modes.
When a product is in DSM it may be able to reduce the overall platform current by lowering the switcher output voltage,
disabling some regulators, or forcing some GPO low. This can be obtained by SPI configuration of the Standby response of the
circuits along with control of the Standby pins.
To ensure that shared resources are properly powered when required, the system will only be allowed into Standby when both
the STANDBY and the STANDBYSEC are activated. The states of the Standby pins only have influence in On mode. A command
to transition to one of the Low-power Off states (User Off or Memory Hold, initiated with USEROFFSPI = 1) has priority over
Standby.
Note that the Standby pins are programmable for Active High or Active Low polarity, and that decoding of a Standby event will
take into account the programmed input polarities associated with each pin.
Table 28. BP Detection Thresholds
Threshold in V
Bit setting
Falling Edge
Rising Edge
BPSNS1
BPSNS0
UVDET
LOBATL
LOBATH
BPON
0
0
2.55
2.8
3.0
3.2
0
1
2.55
2.9
3.1
3.2
1
0
2.55
3.0
3.3
3.2
1
1
2.55
3.1
3.4
3.2
Notes
57.
Default setting for BPSNS[1:0] is 00. The above specified thresholds are ±50 mV accurate for the indicated edge. A hysteresis is applied
to the detectors on the order of 100 mV. BPON is monitoring BP. UVDET, LOBATL and LOBATH are monitoring BPSNS and thresholds
are correlated.
Table 29. Power Monitoring Summary
BPSNS
BPONS
LOBATHS
LOBATLS
< LOBATL
0
0
1
LOBATL-LOBATH
0
0
0
LOBATH-BPON
0
1
0
>BPON
1
1
0
Table 30. Standby Pin and Polarity Control
STANDBY (Pin)
STANDBYINV (SPI bit)
STANDBYSEC (Pin)
STANDBYSECINV (SPI bit)
STANDBY Control (58)
0
0
x
x
0
x
x
0
0
0
1
1
x
x
0
x
x
1
1
0
0
1
0
1
1



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