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13892 Datasheet(PDF) 79 Page - Freescale Semiconductor, Inc |
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13892 Datasheet(HTML) 79 Page - Freescale Semiconductor, Inc |
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79 / 158 page ![]() FUNCTIONAL DEVICE OPERATION SUPPLIES Analog Integrated Circuit Device Data Freescale Semiconductor 79 MC13892 Since the switchers have a strong sourcing capability but no active sinking capability, the rising slope is determined by the switcher, but the falling slope can be influenced by the load. Additionally, as the current capability in PFM mode is reduced, controlled DVS transitions in PFM mode could be affected. Critically timed DVS transitions are best assured with PWM mode operation. Note that there is a special mode of DVS control for Switcher Increment / Decrement (SID) operation described later in this chapter. DVS pin controls are not included for SW3 and SW4. However, voltage transitions programmed through the SPI will step in increments of 25 mV per 4.0 s, to allow SPI controlled voltage stepping with SWx[4:0]. Additionally, SW3 and SW4 include Standby mode set point programmability. Figure 20 shows the general behavior for the switchers when initiated with pin controlled DVS, SPI programming or standby control. Figure 20. SW1 Voltage Stepping with Pin Controlled DVS Note that the DVSx input pins are reconfigured for Switcher Increment / Decrement (SID) control mode when SPI bit SIDEN = 1. Refer to the SID description below for further details. SWITCHER INCREMENT / DECREMENT A scheme for incrementing or decrementing the operating set points of SW1 and SW2 is desirable for improved Dynamic Process and Temperature Compensation (DPTC) control in support of fine tuning power domains for the processor supply tree. An increment command will increase the set point voltage by a single 25 mV step. A decrement command will decrease the set point by a single 25 mV step. The transition time for the step will be the same as programmed with SWxDVSSPEED[1:0] for DVS Table 49. DVS Control Logic Table for SW1 and SW2 STANDBY (72) DVSx Pin Set Point Selected by 0 0 SWx[4:0] 0 1 SWxDVS[4:0] 1 X SWxSTBY[4:0] Notes 72. STANDBY is the logical anding of STANDBY and STANDBYSEC Table 50. DVS Speed Selection for SW1 and SW2 SWxDVSSPEED[1:0] Function 00 25 mV step each 2.0 s 01 (default) 25 mV step each 4.0 s 10 25 mV step each 8.0 s 11 25 mV step each 16 s |
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