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INA701 Datasheet(PDF) 33 Page - Texas Instruments

Part # INA701
Description  INA701 40V, 16-Bit, I2C Output Digital Power Monitor in WCSP With 5mΩ EZShunt™ Technology
PDF  47 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

INA701 Datasheet(HTML) 33 Page - Texas Instruments

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7 Application and Implementation
Note
Information in the following applications sections is not part of the TI component specification,
and TI does not warrant its accuracy or completeness. TI’s customers are responsible for
determining suitability of components for their purposes, as well as validating and testing their design
implementation to confirm system functionality.
7.1 Application Information
7.1.1 Device Measurement Range and Resolution
Table 7-1 shows the full scale voltage on shunt, bus, and temperature measurements, along with the associated
step size.
Table 7-1. Register Full Scale Values and Resolution
PARAMETER
REGISTER ADDRESS
SIZE
FULL SCALE VALUE
RESOLUTION
Current
7h
16 bit, signed
±6.2259A
190µA/LSB
Bus voltage
5h
16 bit, signed, always
positive
0V to 40V
3.125mV/LSB
Die Temperature
6h
12 bit, signed
–40°C to +150°C
125m°C/LSB
Power
8h
24 bit, unsigned
0.63534kW
38µW/LSB
Energy
9h
40 bit, unsigned
668.5MJ
0.608mJ/LSB
Charge
Ah
40 bit, signed
6.52835MC
11.875µC/LSB
The internal die temperature sensor range extends from –256°C to +256°C but is limited by the junction
temperature range of –40°C to 125°C. Likewise, the bus voltage measurement range extends up to 102.4V but
is limited by silicon to 40V.
Current, bus voltage, temperature, power, energy, and charge measurements can be read through the
corresponding address registers. Values are calculated by multiplying the returned value by the corresponding
LSB size.
Signed values are represented in two's compliment format.
Upon overflow, the ENERGY register rolls over and starts from zero. This register value can also be reset at any
time by setting the RSTACC bit in the CONFIG register.
An overflow event in the CHARGE register is indicated by the CHARGEOF bit. If an overflow condition occurs,
the CHARGE register must be manually reset by setting the RSTACC bit in the CONFIG register.
See Detailed Design Procedure for a design example using these equations.
7.1.2 ADC Output Data Rate and Noise Performance
The INA701 noise performance and effective resolution depend on the ADC conversion time. The device
also supports digital averaging which can further help decrease digital noise. The flexibility of the device to
select ADC conversion time and data averaging offers increased signal-to-noise ratio and achieves the highest
dynamic range with lowest offset. The profile of the noise at lower signals levels is dominated by the system
noise that is comprised mainly of 1/f noise or white noise. The INA701 effective resolution of the ADC can be
increased by increasing the conversion time and increasing the number of averages.
Table 7-2 shows the output data rate conversion settings supported by the device. The fastest conversion
setting is 50µs. Typical noise-free resolution is represented as Effective Number of Bits (ENOB) based on device
measured data. The ENOB is calculated based on noise peak-to-peak values, which takes full noise distribution
into consideration. The conversion time for the temperature measurement is set to the power-on default value.
www.ti.com
INA701
SBOSAM2 – AUGUST 2025
Copyright © 2025 Texas Instruments Incorporated
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