AMC7834 datasheet(3/97 Pages) TI2

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AMC7834

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SLAS972B – NOVEMBER 2014 – REVISED MARCH 2016

Product Folder Links: AMC7834

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Revision History (continued)

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Changed text in two locations of paragraph 4 in Drain Switch Control: From: "AVSS" To: "AVDD and AVSS" ..................... 39

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Added text to the last paragraph of Drain Switch Control: "The AVDD detection circuit is set to trigger the PA_ON

signal to the OFF state in response to an out of range event." ........................................................................................... 39

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Added section: AVDD Detection Alarm ................................................................................................................................. 42

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Changed text in the second paragraph of Open-Loop Mode From: "The current-sense amplifier outputs are

converted continuously by the device ADC.." To: "The current-sense amplifier outputs are converted by the device

ADC.." .................................................................................................................................................................................. 47

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Changed 0x06 Default value From: 0000 To: 0001 in Table 9 ........................................................................................... 52

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Changed R-00h To: R-01h in Bits 7:0 of Figure 69 ............................................................................................................. 54

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Changed the Reset value From: 0000h To: 0001h in Table 13 .......................................................................................... 54

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Changed Bit 12 of Table 15 From: Reserved To: CMODE ................................................................................................. 55

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Changed Bit 10 of Table 18 From: 000: Invalid To: 000: 1 ................................................................................................. 56

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Changed Bit 5-4 of Table 18 From: 00: Invalid To: 00: 1 .................................................................................................... 56

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Changed Bit 3-2 of Table 18 From: 00: Invalid To: 00: 1 .................................................................................................... 57

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Changed Bit 1-0 of Table 18 From: 00: Invalid To: 00: 1 .................................................................................................... 57

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Changed General Status Register (address = 0x1F) [reset = 0x0000] ................................................................................ 67

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Added text to item 2 of Initialization Procedure: A 250 µs POR delay occurs..." ................................................................ 82

Changes from Original (November 2014) to Revision A

Page

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Release full version production data data sheet ................................................................................................................... 1

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