AMC7834 datasheet(49/97 Pages) TI2

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ref

(DRAIN)

SENSE

CLOSEDLOOP

11: 0

51200

Filter

Bipolar DAC

Closed Loop

Slew-Rate

Control

Serial Interface

Closed Loop Register

Closed Loop Settling

Time Register

Integrator

R(SENSE)

Current-Sense

Amplifier

VDRAIN

PA FET

ADC

I(DRAIN)

SENSE+

SENSE-

AMC7834

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SLAS972B – NOVEMBER 2014 – REVISED MARCH 2016

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Figure 64. AMC7834 Closed-Loop Current Controller

Each of the four digital control loops consists of a digital integrator and a bipolar DAC in the forward path to drive

the gate of a PA FET. A high-side current-sense amplifier in the feedback path senses the drain bias current and

its output is converted by the device ADC.

As with the DACs in open-loop operation, the closed-loop current controllers can be set to clamp mode. When a

current-controller goes into clamp mode the bipolar DAC output is immediately set to its corresponding clamp

voltage and current-sense conversions are stopped. Note that with the exception of the current-sense inputs all

other monitoring inputs continue to be converted by the device ADC while in clamp mode. Clamping does not

clear the closed-loop state making it possible to return to the same voltage being output before the clamp event

was issued.

Since the drain current does not immediately update in response to the out-of-clamp gate voltage, it is

recommended to stop the ADC conversion prior to leaving the clamp state and re-starting conversion only after

the drain current has stabilized. The stabilization time is dependent on the filtering at the bipolar DAC output and

the PA FET characteristics.

The target drain current is set by the Closed Loop registers (address 0x38 to 0x3B) and is given by Equation 10.

where

•

I(DRAIN) is the PA drain current (in Amperes)

•

CLOSEDLOOPn[11:0] is the 12-bit digital code that is input to the control loop to set I(DRAIN)

•

Vref is the device reference voltage

•

R(SENSE) is the sense resistor resistance (in Ohms)

(10)

The control loop sets the target drain current by continuously maintaining a constant voltage across the shunt

resistor (V(SENSE) = I(DRAIN) × R(SENSE)). The control loop continuously attempts to zero-out the error at the input of

the integrator by adjusting the DAC output voltage and consequently keeping the drain current constant.

Assuming negligible drift in the sense resistor, any variation in the drain current due to changes in the PA FET

characteristics over time and temperature are automatically tracked and corrected.

AMC7834 Datasheet(PDF) 49 Page - Texas Instruments

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