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PCM1861 Datasheet(PDF) 49 Page - Texas Instruments |
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PCM1861 Datasheet(HTML) 49 Page - Texas Instruments |
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49 / 145 page ![]() Time An interrupt is generated (1) DIFF_LEVEL > 0 REF_LEVEL (2) DIFF_LEVEL < 0 49 PCM1860, PCM1861, PCM1862 PCM1863, PCM1864, PCM1865 www.ti.com SLAS831D – MARCH 2014 – REVISED MARCH 2018 Product Folder Links: PCM1860 PCM1861 PCM1862 PCM1863 PCM1864 PCM1865 Submit Documentation Feedback Copyright © 2014–2018, Texas Instruments Incorporated 9.3.10.2.1 Secondary ADC Analog Input Range To match the dynamic range of the secondary ADC to an incoming line level signal, an overall attenuation is applied to the incoming signal. This attenuation is also present in controlsense mode. The impact of this is that the secondary ADC in controlsense mode can only detect control signals up to 4.3 V. Exact values will vary a small amount from device to device along with the gain error. Input impedance of the secondary ADC is designed to be 20 kΩ. 9.3.10.2.2 Frequency Response of the Secondary ADC The natural response of the secondary ADC is not flat by frequency. However, the frequency response can be flattened, so that all frequencies are equally sensitive to the energysense detector by modifying the LPF or HPF biquads in the DSP. 9.3.10.3 Secondary ADC Controlsense DC Level Change Detection This function is used for external analog controls, such as potentiometers to set volume, tone control, or a sensor. The data for control sense has no high pass filter applied to it, even if the main audio path does have a HPF enabled. AS shown in Figure 36, there are two parameters for the dc level change detection: reference level (REF_LEVEL) and difference level (DIFF_LEVEL). Each input pin (input 1 through 8) has a different reference and difference level. Figure 36. DC Detection Function Users set a reference point, and a difference point. If the voltage at the control point crosses the difference point then an interrupt is driven from the device. This is useful for filtering out noise, as well as reducing the load on the host processor for controls that tend to be set and forget (such as volume). The data from the secondary ADC can also be streamed out of the device in TDM form and directly from the I2C register map. AUXADC_DATA_CTRL (Page.0 0x58) is used to configure and check the status of the DC detector. This feature (thresholds and interrupts) is available in both active and sleep modes. In sleep mode, the device automatically scans through each channel designated a controlsense input. In active mode, the scanning will need to be done manually by a host microcontroller by modifying the SEC_ADC_INPUT_SEL (Page.0, 0x0A) register. Most applications requiring the use of a potentiometer for control can simply use the SIGDET_DC_LEVEL_CHx_x registers to read the 8-bit value. To enable the SIGDET_DC_LEVEL_CHx_x registers to work, then the DC_NOLATCH AUXADC_DATA_CTRL (Page.0, 0x58, B[7]) should be set to 1, and the appropriate input pins should be set to controlsense inputs SIGDET_CH_MODE (Page.0, 0x30) Direct 16-bit two's compliment reads from the secondary ADC can be done using AUXADC_DATA_CTRL (Page.0, 0x58) includes a latch function that is used to read the data the secondary ADC on demand in 16-bit two's compliment format from registers 0x59 and 0x5A. |
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