PCM1861 datasheet(71/145 Pages) TI2

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MD0 26

MS 25

MC 24

MOSI 23

MISO 22

GPIO1/INTA/DMIN 21

GPIO2/INTB/DMCLK 20

GPIO3/INTC 19

3.3 V SPI Select

Interrupt / GPIO

SPI

MD0 26

MD1 25

MD4 24

MD3I 23

MD2 22

MD5 21

MD6 20

INT 19

Interrupt and Gain Selection

Sample Rate and

Master/Slave Selection

Digital Audio Format Selection

Filter Mode Selection

Interrupt

PCM1860, PCM1861, PCM1862

PCM1863, PCM1864, PCM1865

www.ti.com

SLAS831D – MARCH 2014 – REVISED MARCH 2018

Product Folder Links: PCM1860 PCM1861 PCM1862 PCM1863 PCM1864 PCM1865

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Application Information (continued)

10.1.1 Device Control Method

10.1.1.1 Hardware Control

The PCM1860 and PCM1861 are controlled with pullup or pulldown voltages on pins MD0 through MD6. The INT

pin is ideally designed to be used with a microcontroller that can treat the pin as both an input (when used as an

interrupt) and as an output to pull the pin high, and force power down. See the Pin Configuration and Functions

for the PCM1860 and PCM1861 for specific configuration details. The hardware control interface is shown in

Figure 55.

Figure 55. PCM1860 and PCM1861 Hardware Control Interface

10.1.1.2 Software Control

10.1.1.2.1

SPI Control

SPI control is selected by the MD0 pin; in this case, MDO connects to 3.3 V, so that the device acts as an SPI

slave. The SPI control interface is shown in Figure 56.

Figure 56. SPI Control Interface Including Interrupt Signals

PCM1861 Datasheet(PDF) 71 Page - Texas Instruments

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