PCM1861 datasheet(62/145 Pages) TI2

62 / 145 page

PCM1860, PCM1861, PCM1862

PCM1863, PCM1864, PCM1865

SLAS831D – MARCH 2014 – REVISED MARCH 2018

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Product Folder Links: PCM1860 PCM1861 PCM1862 PCM1863 PCM1864 PCM1865

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9.5 Programming

9.5.1 Control

9.5.1.1 Hardware Control Configuration

PCM186x devices require the following functions to be configured on startup. Hardware-controlled devices

require a subset of these configurations:

•

Control interface type and address for PCM186x software-controlled devices

•

The clock mode and rate (automatic in slave mode, or divider ratio in master mode) for hardware-controlled

devices. For more details see the Clocks section.

•

The interface audio data format for hardware-controlled devices.

•

Digital filter selection (FIR or IIR) for hardware-controlled devices; requires a power cycle to change.

•

Analog input channels and PGA gain for hardware-controlled devices.

9.5.1.2 Software-Controlled Device Configuration

PCM186x software-controlled devices are configured and controlled by using either I2C or SPI using MD0 and

MD1. Table 20 shows the MD0 control protocols, and Table 21 shows the MD1 mode selection.

Table 20. MD0: Control Protocol Select

MD0

Control Protocol

Low (or floating)

I2C Mode

High

SPI Mode

Table 21. MD1: I2C Address or SPI Chip Select

MODE

MD1 USE

STATIC MD1 VALUE

CONFIGURATION

I2C

Address pin

Low

I2C Address: 0x94

I2C

Address pin

High

I2C Address: 0x96

SPI

MS (SPI Chip Select)

N/A

9.5.1.3 SPI Interface

The SPI interface is a 4-wire synchronous serial port that operates asynchronously to the serial audio interface

and the system clock (SCK). The serial control interface is used to program and read the on-chip mode registers.

The control interface includes MISO, MOSI, MC, and MS. MISO (master in slave out) is the serial data output,

used to read back the values of the mode registers; MOSI (master out slave in) is the serial data input, used to

program the mode registers.

MC is the serial bit clock, used to shift data in and out of the control port on the MC falling edge. MS is the

active-low mode control enable, used to enable the internal mode register access. If data from the device is not

required, the MISO pin can be assigned to GPIO1 by register control.

9.5.1.3.1

All read and write operations for the serial control port use 16-bit data words. Figure 47 shows the control data

word format. The most significant bit is the read and write (R/W) bit. For write operations, the bit must be set to 0.

For read operations, the bit must be set to 1. There are seven bits, labeled IDX[6:0], that hold the register index

(or address) for the read and write operations. The least significant eight bits, D[7:0], contain the data to be

written to, or the data that was read from, the register specified by IDX[6:0].

Figure 48 and Figure 49 show the functional timing diagram for writing or reading through the serial control port.

MS should be held at logic 1 state until a register needs to be written or read. To start the register write or read

cycle, MS should be set to logic 0. Sixteen clocks are then provided on MC, corresponding to the 16 bits of the

control data word on MOSI and readback data on MISO. After the eighth clock cycle has completed, the data

from the indexed-mode control register appears on MISO during the read operation. After the sixteenth clock

cycle has completed, the data is latched into the indexed-mode control register during the write operation. To

write or read subsequent data, MS should be set to logic 1 once.

PCM1861 Datasheet(PDF) 62 Page - Texas Instruments

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