PCM1861 datasheet(13/145 Pages) TI2

13 / 145 page

PCM1860, PCM1861, PCM1862

PCM1863, PCM1864, PCM1865

www.ti.com

SLAS831D – MARCH 2014 – REVISED MARCH 2018

Product Folder Links: PCM1860 PCM1861 PCM1862 PCM1863 PCM1864 PCM1865

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(1)

32-dB gain when using differential mode inputs is only available in SW-controlled devices.

(2)

Specified by design.

7.5 Electrical Characteristics: PGA and ADC AC Performance

all specifications at TA = 25°C, AVDD = 3.3 V, DVDD = 3.3 V, IOVDD = 3.3 V, master mode, single-speed mode, fS = 48 kHz,

system clock = 256 × fS, and 24-bit data (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

PRIMARY PGA AND ADC

Input channel signal-to-noise ratio,

differential input

0-dB PGA gain, –60-dB input signal,

master mode at Diff input

PCM1860

PCM1862

PCM1864

103

PCM1861

PCM1863

PCM1865

110

32-dB PGA gain(1), –86-dB input signal, master mode at

Diff input

Input channel THD+N, differential

input

0-dB PGA gain, –1-dB input signal, master mode at Diff

input

–85

–93

32-dB PGA gain, –33-dB input signal, master mode at

Diff input

–76

–84

L channel to R channel separation line

input

0-dB PGA gain, –1-dB input signal, master mode

–105

L channel to R channel separation mic

input

20-dB PGA gain, –1-dB input signal, master mode

–105

L1 channel to L2 channel separation

line input

0-dB PGA gain, –1-dB input signal, master mode

–105

R1 channel to R2 channel separation

line input

0-dB PGA gain, –1-dB input signal, master mode

–105

L1 channel to L2 channel separation

mic input

20-dB PGA gain, –1-dB input signal, master mode

–105

R1 channel to R2 channel separation

mic input

20-dB PGA gain, –1-dB input signal, master mode

–105

Range of analog PGA

–12 to +12 dB (1-dB step), 20 dB, and 32 dB

–12(2)

Accuracy of PGA + ADC

0.5

Matching between PGA + ADCs on-

chip

0.05

Full-scale voltage input

Single-ended mode

2.1

VRMS

Differential mode (2.1 VRMS per pin)

4.2

VRMS

Input channel signal-to-noise ratio,

single-ended input

0-dB PGA gain, –60-dB input signal,

master mode at SE input

PCM1860

PCM1862

PCM1864

103

PCM1861

PCM1863

PCM1865

106

32-dB PGA gain, –92-dB input signal, master mode at

SE input

Input channel THD+N, single-ended

input

0-dB PGA gain, –1-dB input signal, master mode at SE

input

32-dB PGA gain, –33-dB input signal, master mode at

SE input

Input impedance per analog input pin

PCM1864 and PCM1865

kΩ

PCM1860, PCM1861, PCM1862, and PCM1863

CMRR

Common-mode rejection ratio

Differential input, 1-kHz signal on both pins and measure

level at output

SECONDARY ADC PERFORMANCE

Default Energysense signal detection

threshold

At 1 kHz

–57

dBFS

Energysense signal bandwidth

kHz

Energysense accuracy(2)

Secondary ADC accuracy

bits

Secondary ADC sampling rate

192

kHz

PCM1861 Datasheet(PDF) 13 Page - Texas Instruments

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