PCM1861 datasheet(64/145 Pages) TI2

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SDA

SCL

Start

condition

1–7

1–8

Stop

condition

Slave address

R/W

ACK

DATA

ACK

DATA

ACK

R/W: Read operation if 1;otherwise,write operation

ACK: Acknowledgement of a byte if 0

DATA: 8 bits (byte)

PCM1860, PCM1861, PCM1862

PCM1863, PCM1864, PCM1865

SLAS831D – MARCH 2014 – REVISED MARCH 2018

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Product Folder Links: PCM1860 PCM1861 PCM1862 PCM1863 PCM1864 PCM1865

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9.5.1.4 I2C Interface

The PCM186x software-controlled devices support the I2C serial bus and the data transmission protocol for

standard and fast mode as a slave device. This protocol is explained in I2C specification 2.0.

The I2C control port is available even in the absence of any other clocks in the system.

In I2C mode, the control pins are changed as shown in Table 22.

Table 22. I2C Pins and Functions

PIN NAME

PIN NUMBER

PROPERTY

DESCRIPTION

SDA

Input / Output

I2C data

SCL

Input

I2C clock

Input

I2C address 1

9.5.1.4.1

Slave Address

The PCM186x software-controlled devices have a 7-bit slave address, as shown in Table 23. The first six bits

(MSBs) of the slave address are factory preset to 1001 01. The next bit of the address byte is the device select

bit, which can be user-defined by the AD pin. A maximum of two PCM186x devices can be connected on the

same bus at one time. Each device responds when receiving the respective slave address.

Table 23. I2C Slave Address

MSB

LSB

R/W

9.5.1.4.2

Packet Protocol

A master device must control packet protocol, which consists of start condition, slave address, read/write bit,

data if write or acknowledge if read, and stop condition. The PCM186x software-controlled devices support only

slave receivers and slave transmitters. Figure 50 shows the basic I2C framework.

write operation

Transmitter

------------

Data Type

slave

address

R/W

ACK

DATA

ACK

DATA

ACK

read operation

Transmitter

------------

Data Type

slave

address

R/W

ACK

DATA

ACK

DATA

ACK

M: Master Device MMM S: Slave Device

St: Start Condition MMM Sp: Stop Conditiion

Figure 50. Basic I2C Framework

9.5.2 Current Status Registers

Page.0, registers 0x72 through 0x75 and 0x78 can be used to read the device status at any time. Sample rate,

power rail status, clock error, and clock ratios can all be read from these registers.

PCM1861 Datasheet(PDF) 64 Page - Texas Instruments

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