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PCM5121 Datasheet(PDF) 82 Page - Texas Instruments |
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PCM5121 Datasheet(HTML) 82 Page - Texas Instruments |
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82 / 121 page ![]() 82 PCM5121, PCM5122 SLAS763C – AUGUST 2012 – REVISED OCTOBER 2018 www.ti.com Product Folder Links: PCM5121 PCM5122 Submit Documentation Feedback Copyright © 2012–2018, Texas Instruments Incorporated This bit controls whether to ignore the SCK halt (static or frequency is lower than acceptable) detection. When ignored an SCK halt will not cause a clock error. Default value: 0 0: Regard SCK halt detection 1: Ignore SCK halt detection IDCM Ignore LRCK/BCK Missing Detection This bit controls whether to ignore the LRCK/BCK missing detection. The LRCK/BCK need to be in low state (not only static) to be deemed missing. When ignored an LRCK/BCK missing will not cause the DAC go into powerdown mode. Default value: 0 0: Regard LRCK/BCK missing detection 1: Ignore LRCK/BCK missing detection DCAS Disable Clock Divider Autoset This bit enables or disables the clock auto set mode. When dealing with uncommon audio clock configuration, the auto set mode must be disabled and all clock dividers must be set manually. Addtionally, some clock detectors might also need to be disabled. The clock autoset feature will not work with PLL enabled in VCOM mode. In this case this feature has to be disabled and the clock dividers must be set manually. Default value: 0 0: Enable clock auto set 1: Disable clock auto set IPLK Ignore PLL Lock Detection This bit controls whether to ignore the PLL lock detection. When ignored, PLL unlocks will not cause a clock error. The PLL lock flag at Page 0 / Register 4, bit 4 is always correct regardless of this bit. Default value: 0 0: PLL unlocks raise clock error 1: PLL unlocks are ignored Table 83. Page 0 / Register 40 Dec Hex b7 b6 b5 b4 b3 b2 b1 b0 40 28 RSV RSV AFMT1 AFMT0 RSV RSV ALEN1 ALEN0 Reset Value 0 0 1 0 RSV Reserved Reserved. Do not access. AFMT[1:0] I2S Data Format These bits control both input and output audio interface formats for DAC operation. Default value: 00 00: I2S 01: TDM/DSP 10: RTJ 11: LTJ ALEN[1:0] I2S Word Length These bits control both input and output audio interface sample word lengths for DAC operation. Default value: 10 00: 16 bits 01: 20 bits 10: 24 bits 11: 32 bits |
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