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PCM5121 Datasheet(PDF) 112 Page - Texas Instruments

Part # PCM5121
Description  PCM512x 2-VRMS DirectPath™, 112-dB and 106-dB Audio Stereo DACs With 32-Bit, 384-kHz PCM Interface
PDF  121 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

PCM5121 Datasheet(HTML) 112 Page - Texas Instruments

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PCM5121, PCM5122
SLAS763C – AUGUST 2012 – REVISED OCTOBER 2018
www.ti.com
Product Folder Links: PCM5121 PCM5122
Submit Documentation Feedback
Copyright © 2012–2018, Texas Instruments Incorporated
Table 133. Recommended Clock Divider Settings for SCK as Master Clock (continued)
fS (kHz)
RSCK
SCK (MHz)
DSP fS
NMAC
DSP CLK
(MHz)
MOD fS
MOD f (kHz)
NDAC
DOSR
NCP
CP f (kHz)
192
128
24.576
128
1
24.576
32
6144
4
2
4
1536
192
192
36.864
192
1
36.864
32
6144
6
2
4
1536
192
256
49.152
256
1
49.152
32
6144
8
2
4
1536
384
64
24.576
64
1
24.576
16
6144
4
1
4
1536
384
128
49.152
128
1
49.152
16
6144
8
1
4
1536
12.1.3 Coefficient Data Formats
All mixer gain coefficients are 24-bit coefficients using a 4.20 number format. Numbers formatted as 4.20
numbers have 4 bits to the left of the binary point and 20 bits to the right of the binary point. If the most
significant bit is logic 0, the number is a positive number. If the most significant bit is a logic 1, then the number is
a negative number. In this case, every bit must be inverted, a 1 added to the result.
12.1.4 Power Down and Reset Behavior
Register values including those in the Coefficient Memory and Instruction Memory should remain when the
device is put into power down mode. (PG0 Reg 0x02).
Register values in the device are reset to defaults when bit 0 or 4 of (Pg0, Reg 0x01) is set to 1. Please see the
register description for more information.



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