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TCC76x
Specification Rev. 0.07
February 23, 2005
32-bit RISC Microprocessor for Digital Media Player
USB CONTROLLER
Preliminary
9-6
Endpoint Interrupt Enable Register (UBEIEN)
0x8000051C
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Reserved
EP2
EP1
EP0
EP2 [2]
Type
EP2 Interrupt Control
0
Disable EP2 interrupt
1
R/W
Enable EP2 interrupt
EP1 [1]
Type
EP1 Interrupt Control
0
Disable EP1 interrupt
1
R/W
Enable EP1 interrupt
EP0 [0]
Type
EP0 Interrupt Control
0
Disable EP0 interrupt
1
R/W
Enable EP0 interrupt
USB Interrupt Enable Register (UBIEN)
0x8000052C
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Reserved
RST
0
SP
RST [2]
Type
Reset Interrupt Control
1
Enable Reset interrupt.
0
R/W
Disable Reset interrupt
SP [0]
Type
Suspend Interrupt Control
1
Enable Suspend interrupt
0
R/W
Disable Suspend interrupt.
*) Once suspend interrupt is generated, this interrupt must be disabled not to generate it
continuously. Enable suspend interrupt right after the reset or resume interrupt is detected,
and disable suspend interrupt right after that interrupt is detected.
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