SLRC400 datasheet(108/130 Pages) PHILIPS

108 / 130 page

Philips Semiconductors

Product Specification Rev. 2.0 November 2001

•CODE Reader IC

SL RC400

108

Preliminary

16.6.2.2 CRC-Coprocessor Settings

For the CRC-Coprocessor the following parameters may be configured:

Parameter

Value

Bit

CRC Register Length

8 Bit or 16 Bit CRC

CRC8

ChannelRedundancy

CRC Algorithm

1 = Algorithm according ISO 15693 or according

ISO/IEC3309

0 = algorithm according to I

•CODE1

CRC3309

ChannelRedundancy

Bit-Processing Direction

Shift the MSBit or LSBit first into the CRC-

CRCMSBFirst

ChannelRedundancy

CRC Preset Value

Any

CRCPresetLSB,

CRCPresetMSB

CRCPresetLSB,

CRCPresetMSB

Table 16-5: CRC-Coprocessor Parameters

The CRC polynomial for the 8-bit CRC is fixed to

The CRC polynomial for the 16-bit CRC is fixed to

16.6.2.3 Status Flags of the CRC-Coprocessor

The status flag CRCReady indicates, that the CRC-Coprocessor has finished processing of all data bytes

found in the FIFO buffer. With the CRCReady flag setting to 1, an interrupt is requested with TxIRq being set.

This supports interrupt driven usage of the CRC-Coprocessor.

When CRCReady and TxIRq are set to 1, respectively, the content of the CRCResultLSB- and

CRCResultMSB-register and the flag CRCErr is valid.

The CRCResultLSB- and CRCResultMSB-register hold the content of the CRC register, the CRCErr flag

indicates CRC validity for the processed data.

16.7

Error Handling during Command Execution

If any error is detected during command execution, this is shown by setting the status flag Err in the

PrimaryStatus Register. For information about the cause of the error, the µ-Processor may evaluate the

status flags in the ErrorFlag Register.

Error Flag of the ErrorFlag Register

Related to Command

AccessError

WriteE2, ReadE2, LoadConfig

FIFOOvl

Not related to a command

CRCErr

Receive, Transceive, CalcCRC

FramingErr

Receive, Transceive

CollErr

Receive, Transceive

Table 16-6: Error Flags Overview

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