ISOTMP35RDFPR datasheet(16/44 Pages) TI2

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Table 7-1. Recommended RISO Values vs Capacitive Load for Stable Operation

CLOAD RANGE

RISO = 0Ω

RISO = 100Ω

RISO = 200Ω

RISO ≥ 300Ω

< 2.2nF

≥ 50°

≥ 55°

2.2nF – 47nF

25° – 45°

35° – 50°

40° – 55°

≥ 45°

47nF – 1µF

≥ 25°

≥ 40°

≥ 55°

≥ 65°

> 1µF

≥ 70°

≥ 90°

As shown in Table 7-1, the phase margin exhibits a minimum in the mid-range capacitive load region,

approximately 2nF to 50nF, where interaction between the output stage and load capacitance introduces

additional phase shift. As the load capacitance increases further, the output pole shifts to lower frequencies,

reducing the loop bandwidth and causing the gain crossover to occur before significant higher-order phase

lag accumulates. This behavior results in improved phase margin at higher capacitive loads and a more

stable, dominant-pole response. When a series isolation resistor, RISO, is used, a zero is introduced that helps

compensate for the phase lag from the load capacitance, further improving stability across the full load range.

Although the output stage supports large capacitive loads, excessive loading increases settling time and can

introduce self-heating effects that degrade measurement accuracy. Therefore, output loading is recommended to

be minimized.

7.3.2.3 Common Mode Transient Immunity (CMTI)

Common-mode transient immunity (CMTI) describes the ability of the ISOTMP35R to maintain a stable output

in the presence of fast voltage transients between the high-voltage sensing domain and the low-voltage system

domain. In applications such as power converters, motor drives, and battery systems, switching devices

generate rapid voltage transitions (high dv/dt) that can couple through parasitic capacitances and disturb

sensitive analog signals. Without sufficient CMTI performance, these transients can introduce errors or glitches

in the measured temperature output.

The ISOTMP35R is designed to operate reliably in these environments and is specified for a typical CMTI of

65kV/µs. This value represents the maximum rate of change of the common-mode voltage at which the output

disturbance remains within a specified amplitude and duration.

Figure 7-4 shows the measured output response of the ISOTMP35R during a common-mode transient event.

In this test, a high dv/dt voltage step is applied across the isolation barrier while the output is monitored. The

device maintains output integrity such that any transient deviation remains limited in magnitude and duration (for

example, < 200mV for < 4µs), providing minimal impact on temperature measurement. This controlled response

verifies that the temperature measurements remain accurate even in the presence of fast switching events.

Time (

s)

-2

-250

-0.5

-0.25

250

500

0.25

750

0.5

1000

0.75

1250

1500

1.25

TA = 25°C, VDD = 5.0V, VCM = 750V, ILOAD = 50A, RISO = 0, CLOAD = 1nF

VCM SR = 65kV/s

VCM

VOUT

Figure 7-4. Common-Mode Transient Response

ISOTMP35R

SNIS244A – SEPTEMBER 2025 – REVISED MAY 2026

www.ti.com

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