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RZ/G3S Datasheet(PDF) 76 Page - Renesas Technology Corp |
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RZ/G3S Datasheet(HTML) 76 Page - Renesas Technology Corp |
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76 / 88 page  RZ/G3S Group 3. Electrical Characteristics R01DS0489EJ0120 Rev.1.20 Page 76 of 88 May 29, 2026 3.5.22 PDM Interface Access Timing Table 3.45 PDM Interface Timing Item Symbol Min. Max. Unit Remarks Clock period tPSYNC 2 32 tCCcyc = 125 ns (8 MHz) Clock High level period tPDCKWH tPSYNC × 0.45 tPSYNC × 0.55 ns Clock Low level period tPDCKWL tPSYNC × 0.45 tPSYNC × 0.55 ns Note: I/O driving ability: IOLH_xx[1:0] = 01b, CL = 30 pF PDM_CLKn tPDCKWH tPDCKWL TP SYNC Figure 3.67 Timing of Clock Output (PDMn_CLK) Table 3.46 PDM Interface Timing Item Symbol Min. Max. Unit Remarks PDMn_DAT input setup time tSU 12.5 — ns PDMn_DAT input hold time tH 0.0 — ns Note: I/O driving ability: IOLH_xx[1:0] = 01b, CL = 30 pF PDM_CLKn (Output) tSU PDM_DATn (Input) tH Figure 3.68 Receive Timing (Synchronized with the Rise of PDMn_CLK) |
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