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6V7 Datasheet(PDF) 149 Page - Renesas Technology Corp |
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6V7 Datasheet(HTML) 149 Page - Renesas Technology Corp |
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149 / 298 page  Rev.1.00 May 18, 2004 page 149 of 296 M306V7MG/MH/MJ/MJA-XXXFP, M306V7FG/FH/FJ/FJAFP Figure 2.12.5 A-D register i (i = 0 to 5) Figure 2.12.4 A-D control register 2 A-D register i Symbol Address When reset ADi(i=0 to 5) 03C416, 03C616, 03C816 Indeterminate 03CA16, 03CC16, 03CE16 Indeterminate Eight bits of A-D conversion result Function R W b7 b0 A-D control register 2 (Note 1) Symbol Address When reset ADCON2 03D416 0000???02 b7 b6 b5 b4 b3 b2 b1 b0 A-D conversion method select bit 0 : Without sample and hold 1 : With sample and hold Bit symbol Bit name Function R W Notes 1: If the A-D control register is rewritten during A-D conversion, the conversion 2: The value of this bit when read is indeterminate. result is indeterminate. SMP Reserved bits Must always be set to “0” Reserved bits Must always be set to “0” 0 0 0 0 00 0 (Note 2) |
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