| Electronic Components Datasheet Search |
|
HD64F36034 Datasheet(PDF) 252 Page - Renesas Technology Corp |
|
|
|||||||||||||||||||||||||||||
HD64F36034 Datasheet(HTML) 252 Page - Renesas Technology Corp |
|
252 / 592 page ![]() Section 12 Timer Z Rev. 4.00 Mar. 15, 2006 Page 220 of 556 REJ09B0026-0400 • To output a 100%-duty cycle waveform, write H'0000 while previous GR value < TCNT_0 ≤ GRA_0. • To change duty cycles while a waveform with a duty cycle of 0% or 100% is being output, make sure the following procedure. • To change duty cycles while a 0%-duty cycle waveform is being output, write to GR while H'0000 ≤TCNT_1 < previous GR value. • To change duty cycles while a 100%-duty cycle waveform is being output, write to GR while previous GR value< TCNT_0 ≤ GRA_0. Note that changing from a 0%-duty cycle waveform to a 100%-duty cycle waveform B. When buffer operation is used and TPSC2 = TPSC1 = TPSC0 = 0. Write H'0000 or a value equal to or more than the GRA_0 value to the buffer register. • To output a 0%-duty cycle waveform, write a value equal to or more than the GRA_0value to the buffer register. • To output a 100%-duty cycle waveform, write H'0000 to the buffer register. For details on buffer operation, see section 12.4.8, Buffer Operation. C. When buffer operation is not used and other than TPSC2 = TPSC1 = TPSC0 = 0. Write a value which satisfies GRA_0 + 1 < GR < H'FFFF to GR directly at the timing shown below. • To output a 0%-duty cycle waveform, write the value while H'0000 is TCNT_1 < previous GR value • To output a 100%-duty cycle waveform, write the value while previous GR value < TCNT_0 ≤ GRA_0. To change duty cycles while a waveform with a duty cycle of 0% and 100% is being output, the following procedure must be followed. • To change duty cycles while a 0%-duty cycle waveform is being output, write to GR while H'0000 ≤ TCNT_1 < previous GR value. • To change duty cycles while a 100%-duty cycle waveform is being output, write to GR while previous GR value< TCNT_0 ≤ GRA_0. Note that changing from a 0%-duty cycle waveform to a 100%-duty cycle waveform and vice versa is not possible. D. Buffer operation is used and other than TPSC2 = TPSC1 = TPSC0 = 0 Write a value which satisfies GRA_0 + 1 < GR < H'FFFF to the buffer register. A waveform with a duty cycle of 0% can be output. However, a waveform with a duty cycle of 100% cannot be output using the buffer operation. Also, the buffer operation cannot be used to change duty cycles while a waveform with a duty cycle of 100% is being output. For details on buffer operation, see section 12.4.8, Buffer Operation. |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |