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32186 Datasheet(PDF) 402 Page - Renesas Technology Corp |
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32186 Datasheet(HTML) 402 Page - Renesas Technology Corp |
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402 / 1032 page ![]() 10.4 TIO (Input/Output-Related 16-Bit Timer) MULTIJUNCTION TIMERS 10 10-106 32185/32186 Group Hardware Manual Rev.1.10 REJ09B0235-0110 May 15, 07 10.4.6 TIO Reload 0/ Measure Registers (TIO0RL0–TIO9RL0) TIO0 Reload 0/ Measure Register (TIO0RL0) <Address: H’0080 0306> TIO1 Reload 0/ Measure Register (TIO1RL0) <Address: H’0080 0316> TIO2 Reload 0/ Measure Register (TIO2RL0) <Address: H’0080 0326> TIO3 Reload 0/ Measure Register (TIO3RL0) <Address: H’0080 0336> TIO4 Reload 0/ Measure Register (TIO4RL0) <Address: H’0080 0346> TIO5 Reload 0/ Measure Register (TIO5RL0) <Address: H’0080 0356> TIO6 Reload 0/ Measure Register (TIO6RL0) <Address: H’0080 0366> TIO7 Reload 0/ Measure Register (TIO7RL0) <Address: H’0080 0376> TIO8 Reload 0/ Measure Register (TIO8RL0) <Address: H’0080 0386> TIO9 Reload 0/ Measure Register (TIO9RL0) <Address:H’0080 0396> <Upon exiting reset: Undefined> b Bit Name Function R W 0–15 TIO0RL0–TIO9RL0 16-bit reload register value R(Note 1) Note 1: These registers are protected against write during measure input mode. Note: • These registers must always be accessed in halfwords. The TIO Reload 0/ Measure Registers serve dual purposes as a register for reloading data into the TIO Count Registers (TIO0CT-TIO9CT) and as a measure register during measure input mode. These registers are pro- tected against write during measure input mode. The content of " the reload 0 register -1" is reloaded into the counter synchronously with the count clock at the following timing: • At the next cycle when after the counter started counting in noise processing input mode, the input signal is inverted and a valid-level signal is entered again before the counter underflows • At the next cycle when the counter is enabled in single-shot output mode • At the next cycle when the counter underflowed in delayed single-shot output or continuous output mode • At the next cycle when the counter is enabled in PWM output mode and at the next cyclewhen the counter value set by the reload 1 register underflowed Simply because data is written to the reload 0 register does not mean that the data is loaded into the counter. The counter is loaded with data in only the above cases. If the register is used as a measure register, the counter value is latched into that measure register by event input. b0 12 34 56 78 9 10 11 12 13 14 b15 TIO0RL0–TIO9RL0 ?? ?? ?? ?? ?? ? ?? ?? ? |
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