32186 datasheet(528/1032 Pages) RENESAS

528 / 1032 page

A/D CONVERTER

11-30

32185/32186 Group Hardware Manual

Rev.1.10 REJ09B0235-0110 May 15, 07

11.2 A/D Converter Related Registers

Disconnection detection voltage (without sample-and-hold)

200

400

600

800

1000

1200

1400

1600

1800

2000

A/D conversion cycle [kHz]

Scan mode: Disconnection detection enabled

Scan mode: Disconnection detection disabled

100

120

Note: Reference value when set as f(BCLK)=20MHz, set BCLK mode in ADCVSD2 bit

of A/D0 conversion speed control register.

2900

3100

3300

3500

3700

3900

4100

4300

4500

4700

4900

5100

A/D conversion cycle [kHz]

Scan mode: Disconnection detection enabled

Scan mode: Disconnection detection disabled

Disconnection detection voltage (without sample-and-hold)

100

120

Note: Reference value when set as f(BCLK)=20MHz, set BCLK mode in ADCVSD2 bit

of A/D0 conversion speed control register.

Figure 11.2.3 A/D Disconnection Detection Assist Data (when Discharge Before Conversion Selected)

Figure 11.2.4 A/D Disconnection Detection Assist Data (when Precharge Before Conversion Selected)

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