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32186 Datasheet(PDF) 879 Page - Renesas Technology Corp |
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32186 Datasheet(HTML) 879 Page - Renesas Technology Corp |
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879 / 1032 page ![]() RAM BACKUP MODE 19 19-7 32185/32186 Group Hardware Manual Rev.1.10 REJ09B0235-0110 May 15, 07 19.3 Example of RAM Backup for Saving Power Consumption 19.3.2 RAM Backup State Figure 19.3.3 shows the RAM backup state of the M32R/ECU. Figure 19.3.4 shows a RAM backup se- quence. When the external circuit outputs "L," input on the SBI# or AD0INi pin is pulled "L." "L" on these input pins generates a RAM backup signal (A and (a) in Figure 19.3.3). To enable RAM backup mode, make the following settings: (1) Create data for RAM check to verify after returning from RAM backup mode to normal mode whether the RAM data has been retained normally ((b) in Figure 19.3.3). (2) To materialize low-power operation, set all programmable input/output pins except port n for input mode (or for output mode, with the output level fixed "L") ((c) in Figure 19.3.3). (3) Set port n for input mode (B and (d) in Figure 19.3.3). This causes the transistor’s base voltage, IB,to go "L," so that the power to all power supply pins except VDDE is shut off (C and D in Figure 19.3.3). By settings in (1) to (3), the VDDE pin voltage goes to 3.0–5.5 V and all other pin voltages drop to 0 V, and the M32R/ECU is thereby placed in RAM backup mode ((d) in Figure 19.3.3). Figure 19.3.3 RAM Backup State for Low Power Operation "L" B C (a) (b) (c) (d) "L" "L" "L" "L" IB 0V A D DC IN VREF0 SBI# AD0INi M32R/ECU VDDE AVCC0 VCCE, VCCER EXCVCC EXCVDD VCC- BUS 3.3V or 5V (5V or 3.3V) (5V or 3.3V) Example of RAM backup processing RAM backup signal External circuit Port n (Note 1) (Note 3) RAM backup power supply Regulator Input Output Regulator (Note 2) Output Note 1: This circuit outputs "L" during RAM backup. Note 2: This port outputs "H" when the power is on, and is set for input mode when in RAM backup mode (one of the port pins selected). Note 3: These pins are used to detect a RAM backup signal. Note 4: Determined by the input level on SBI# pin or AD0INi pin. Note 5: Base voltage IB = 0 causes the power to all power supply pins except VDDE to stop. See A to D in the above explanation. Generate a RAM backup signal (Note 4) Create data for backup RAM check Set the pin connecting to the transistor's base (port n) for input mode (Note 5) RAM backup mode |
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