32186 datasheet(990/1032 Pages) RENESAS

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Appendix 3

PROCESSING OF UNUSED PINS

Appendix 3-4

32185/32186 Group Hardware Manual

Rev.1.10 REJ09B0235-0110 May 15, 07

Appendix 3.1 Example Processing of Unused Pins

(3) When operating in processor mode

Table 3.1.3 Example Processing of Unused Pins during Processor Mode (Note 1)

Pin Name

P61–P63, P70–P77, P82–P87,

P93–P97, P100–P107, P110–P117,

P126, P127, P130–P137, P174, P175

Processing

XOUT (Note 4)

AD0IN0–AD0IN15, AVREF0, AVSS0

Leave open

Connect to VCCE

AVCC0

JTAG

JTDO, JTMS, JTDI, JTCK

JTRST

Pull high to VCCE or low to VSS via a 0-100 k

Ω resistor

Pull low to VSS via a 0-100 k

Ω resistor

Connect to VSS

A/D converter

A9–A30, DB0–DB15,

BLW#/BLE#, BHW#/BHE#, RD#, CS0#, CS1#

Leave open

SBI# (Note 3)

Pull low to VSS via a 1 k

Ω-10 kΩ resistor

Input/output ports (Note 2)

Set the port for input mode and pull each pin low to VSS or

pull high to VCCE via a 1 k

Ω-10 kΩ resistor.

Or set the port for output mode and leave the pin open.

P150, P153, P220, P221

Set the port for input mode and pull each pin low to VSS or

pull high to VCC-BUS via a 1 k

Ω-10 kΩ resistor.

Or set the port for output mode and leave the pin open

Note 1: Process the unused pins in the shortest wiring length possible (within 20 mm) from the microcomputer pins.

Note 2: If any port is set for output mode and left open, care should be taken because the port remains set for input

before it is changed for output in a program after being reset. Therefore, the voltage level at the pin is instable,

and the power supply current tends to increase while the port remains set for input. Because it is possible that

the content of the port direction register will inadvertently be altered by noise or noise-induced runaway,

higher reliability may be obtained by periodically setting the port direction register back again in a program.

Note, however, that P221 is input-only port and does not work as an output port.

Note 3: Make sure that unintended falling edges due to noise, etc. will be not applied. (A falling edge at the SBI# input

causes a system break interrupt to occur.)

Note 4: This is necessary when an external clock is connected to XIN.

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