32186 datasheet(993/1032 Pages) RENESAS

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SUMMARY OF PRECAUTIONS

Appendix 4

Appendix 4-3

32185/32186 Group Hardware Manual

Rev.1.10 REJ09B0235-0110 May 15, 07

Appendix 4.2 Notes on Address Space

• Virtual flash emulation function

The microcomputer has the function to map 8-Kbyte memory blocks of the internal RAM (maximum for 32185 is

4 blocks, for 32186 is 8 blocks) into areas (L banks) of the internal flash memory that are divided in 8-Kbyte

units. This functions is referred to as the Virtual Flash Emulation Function.

This function allows the data located in 8-Kbyte blocks of the internal RAM to be changed with the contents of

internal flash memory at the addresses specified by the Virtual Flash L Bank Register. That way, the relevant

RAM data can read out by reading the content of internal flash memory. For details about this function, see

Section 6.7, "Virtual Flash Emulation Function."

• Dummy access area

Address H'0080 0600 to H'0080 0603 are dummy areas.

When there is access to these areas, writing value is disabled and reading value is undefinited.

In addition, it does not effect on the other SFR area by writing and reading out operation to dummy access area.

Appendix 4.3 Notes on EIT

The Address Exception (AE) requires caution because if one of the instructions that use “register indirect + register

update” addressing mode (following three) generates an address exception when it is executed, the values of the

registers to be automatically updated (Rsrc and Rsrc2) become undefined.

Except that the values of Rsrc and Rsrc2 become undefined, these instructions behave the same way as when used

in other addressing modes.

• Applicable instructions

LD Rdest, @Rsrc+

ST Rsrc1, @-Rsrc2

ST Rsrc1, @+Rsrc2

If the above case applies, consider the fact that the register values become undefined when you design the processing to

be performed after executing said instructions. (If an address exception occurs, it means that the system has some fatal

fault already existing in it. Therefore, address exceptions must be used on condition that control will not be returned from

the address exception handler to the program that was being executed when the exception occurred.)

Appendix 4.4 Notes on Internal RAM

Precautions about the Internal Memory is shown below.

• The writes from DRI,RTD to internal RAM uncompete with access from other bus masters (CPU, DMA, NBD,

SDI), because of using dedicated bus not M32R-FPU.

But in case DRI,RTD transfers and access from other bus masters for area in 16-Kbyte of internal RAM occur at

same time, access competition occurs.

When access competition occurs, arbitration is performed according to the following priority.

NBD/SDI > DMA > CPU > DRI > RTD

• When started by boot mode, internal RAM value is indefinite after started by boot mode in order to "Flash

writing/erasing program" is transferred to internal RAM.

Appendix 4.2 Notes on Address Space

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