32186 datasheet(1002/1032 Pages) RENESAS

1002 / 1032 page

SUMMARY OF PRECAUTIONS

Appendix 4

Appendix 4-12

32185/32186 Group Hardware Manual

Rev.1.10 REJ09B0235-0110 May 15, 07

Appendix 4.9 Notes on Multijunction Timers

Appendix 4.9.10 Notes on using TML measure input

The following describes precautions to be observed when using TML measure input.

• If measure event input and write to the counter occur in the same clock period, the write value is set in the

counter, whereas the up-count value (before being rewritten) is latched into the measure register.

• If clock bus 1 is selected and any clock other than BCLK/2 or BCLK/4 (Note 1) is used for the timer, by

divided by internal prescaler PRS1, the value captured into the measure register is one count larger the

counter value. During the count clock to BCLK/2 or BCLK/4 (Note 1) period interval, however, the captured

value is exactly the counter value.

The diagram below shows the relationship between counter operation and the valid data that can be captured.

Note 1: To select BCLK/2 or BCLK/4, use the PRS012CKS (prescaler 0-2, TML0,1 supplied clock

select) bit. For details, refer to Section 10.2.2, “Common Count Clock Select Function.”

Counter

• When BCLK/2 or BCLK/4 is selected (Note 1)

BCLK/2

or BCLK/4

(Note 1)

BCLK/2

or BCLK/4

(Note 1)

Captured

Counter

• When clock bus 1 is selected

Count clock

Captured

Note 1: To select BCLK/2 or BCLK/4, use the PRS012CKS (prescaler 0-2, TML0,1 supplied clock select) bit.

For details, refer to Section 10.2.2, "Common Count Clock Select Function."

Appendix Figure 4.9.3 Mistimed Counter Value and the Captured Value

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