32186 datasheet(1003/1032 Pages) RENESAS

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SUMMARY OF PRECAUTIONS

Appendix 4

Appendix 4-13

32185/32186 Group Hardware Manual

Rev.1.10 REJ09B0235-0110 May 15, 07

Appendix 4.9 Notes on Multijunction Timers

Appendix 4.9.11 Notes on using TOU PWM output mode

The following describes precautions to be observed when using TOU PWM output mode.

• If the timer is enabled by external input in the same clock period as count is disabled by writing to the enable

bit, the latter has priority so that count is disabled.

• If the counter is accessed for read to the cycle of underflow, the counter value is read out as H'FFFF but

changes to “reload register value -1” at the next count clock timing.

• Because the timer operates synchronously with the count clock, a count clock-dependent delay is included

before F/F output is inverted after the timer is enabled.

Because a 0% or 100% duty-cycle needs to be determined when reloading the counter, there is a one count

clock equivalent delay before F/F is inverted and an interrupt or DMA transfer request is generated. However,

startup requests to other timers are not delayed. For details, see Section 10.8.19, “0% or 100% Duty-Cycle

Wave Output during PWM Output and Single-shot PWM Output Modes.”

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